Arteris Articles

Semiconductor Engineering: Steering The Semiconductor Industry

Isabelle Geday, General Manager of Arteris IP Deployment and Kurt Shuler, Vice President of Marketing at Arteris IP are both quoted in this new article in Semiconductor Engineering:

Steering The Semiconductor Industry

August 26th, 2021 - By Brian Bailey

What does it take to get a new language, tool, or methodology established in the semiconductor industry? Disruption has rarely worked.


“Everything we do is based on IP-XACT IEEE 1685 standard,” says Isabelle Geday, general manager of Arteris IP Deployment. “It is our duty and our prerogative to train people, as well as we can, on the standard — its existence, its benefits, and the way to use it. By doing this, and by making the effort to do it well, we promote the standard, and long-term we promote a best methodology on the market for the next generation of SoCs. Thankfully, there is good alignment between IP providers, SoC designers, and EDA tool companies.

“I was involved in ISO 26262, which is a functional safety standard for semiconductors and other electronics,” says Kurt Shuler, vice president of marketing at Arteris IP. “In that case there was an existing infrastructure for training, as well as certification companies. But when it comes to the semiconductor industry, there has to be a certain critical mass before it makes sense to invest in a Udemy course, or something like that. 

Topics: iso26262 ArterisIP semiconductor engineering arteris ip ip-xact SoCs kurt shuler training EDA Isabelle Geday ip deployment IP-XACT IEEE 1685

EDA Cafe: What Does MBSE Have to Do with SoCs?

Vincent Thibaut, Director of IP Deployment Product Strategy at Arteris IP authored this new article for EDA Cafe:

What Does MBSE Have to Do with SoCs?

August 17th, 2021 - By Vincent Thibaut


In technology, the only constant is change, sometimes at a dizzying pace. One emerging trend is how product specifications, additions and changes are passed onto system-on-chip (SoC) design teams. Traditionally, this transfer is done by exchanging documents, models (perhaps Simulink) and some form of written use-case descriptions. However, this process is very cumbersome, subjective and error-prone. It is also a very poor method for documenting and tracking revisions required by agile design teams employing best practices. It may not be a problem when building catalog products, but the world has changed.

Topics: SoC NoC automotive ArterisIP arteris ip verification ip-xact Tier 1s Bosch ip deployment IPD SysML vincent thibaut model-based system engineering ISO standard UML Simulink microchip designer Matlab NASA

Semiconductor Engineering: Who Owns In-Chip Monitoring Data?

Kurt Shuler, Vice President of Marketing at Arteris IP is quoted in this new article in Semiconductor Engineering:

Who Owns In-Chip Monitoring Data?

August 10th, 2021 - By Bryon Moyer

Rules are still being formulated even though the technology is already deployed.


“There’s this joint ownership of the data, with different people at different layers doing different things with the data for their own purposes,” said Kurt Shuler, vice president of marketing at Arteris IP. Contracts and regulations further complicate things.

Topics: semiconductor engineering arteris ip SoCs kurt shuler NoCs in-chip data data ownership fabs

Semiconductor Engineering: ISO 26262 - Law Or Framework?

Kurt Shuler, Vice President of Marketing at Arteris IP authors this new article in Semiconductor Engineering:

ISO 26262 - Law or Framework?

August 9th, 2021 - By Kurt Shuler

Collaboration between supplier and customer is key to achieving functional safety goals.


The ISO 26262 standard is a weighty series of documents that many believe has all the force of law or regulation; however, it is not a dictate. It is an agreement on best practices for participants in the vehicle value chain to follow to ensure safety as far as the industry understands it today. There is no monetary fine if the standard is not followed, though it will be difficult to sell automotive products without compliance.

Topics: functional safety automotive semiconductor engineering arteris ip SoCs kurt shuler eco FMEDA automotive chips IEEE P2851 ASIL automotive OEMs NoCs Accellera Functional Safety Working Group RTFM ISO 26262:2018 abstract

Semiconductor Engineering: Auto Displays: Bigger, Brighter, More Numerous

Kurt Shuler, Vice President of Marketing at Arteris IP is quoted in this new article in Semiconductor Engineering:

Auto Displays: Bigger, Brighter, More Numerous

August 5th, 2021 - By Ann Steffora Mutschler

Chips come under new scrutiny as screens become integrated into safety-critical systems.


“A lot of these companies were derived from OEMs,” said Kurt Shuler, vice president of marketing at Arteris IP. “Denso, for instance, was part of Toyota before it was spun out. We are seeing differences as far as who is actually creating these chips. Is it the design team? Is it a traditional semiconductor manufacturer? Or is it a Tier 1? It may or may not be the traditional chip vendor. In Japan, there are companies like Fujitsu, and NEC that went into Panasonic, along with companies such as Denso that are designing their own chips, as well as running an IP business. There are other big players like NSITEXE [fully funded by Denso] and Renesas Electronics, the latter of which has been an incumbent in car displays for a long period of time worldwide. In Europe, companies like NXP have long been big players there, but Bosch and Continental also are creating their own chips. In every situation, there is recognition that the displays are becoming critical to the overall brain of the car, so the business is changing."

Topics: automotive ISO 26262 certification semiconductor engineering arteris ip SoCs kurt shuler ASIL-B automotive chips NoCs hardware safety requirements software safety requirements

Semiconductor Engineering: Will PAYGO Shake Up How We Pay For Chips?

Guillaume Boillet, Director of Product Management at Arteris IP is quoted in this new article in Semiconductor Engineering:

Will PAYGO Shake Up How We Pay For Chips?

August 5th, 2021 - By Bryon Moyer

Superchip approach could reduce costs, but everyone is not convinced.


“This could turn out to be a brilliant business model if the optional features are enticing enough for a large part of the customer base to adopt them,” said Guillaume Boillet, director of product management at Arteris IP. “At the same time, it seems like a risky bet, considering the complexity of this multi-variate problem

Topics: semiconductor engineering arteris ip SoCs chipsets 5G NoCs on-chip monitoring

Semiconductor Engineering: Sweeping Changes Ahead For Systems Design

Kurt Shuler Vice President of Marketing at Arteris IP is quoted in this new article in Semiconductor Engineering:

Sweeping Changes Ahead For Systems Design

July 29th, 2021 - By Ann Steffora Mutschler

Demand for faster processing with increasingly diverse applications is prompting very different models.


“It’s not about the hardware instruction set architecture,” said Kurt Shuler, vice president of marketing at Arteris IP. “It’s about the software for the hardware instruction set architecture. This is why if you look at the x86 ISA, one of the reasons it’s still around today is because so much software has been created for it. With Arm, and others, you’ve had to create this stuff in it. Once it reaches a certain inflection point, things go nonlinear. I don’t know that we’re there just yet, but things are getting there. A shift is happening, and what this means, big picture, is that in terms of integration of companion chips to these x86 chips, generally they’re not in the same package because it’s an Intel chip product oftentimes going into an Intel or AMD motherboard. Then there is a PCIe card with the accelerator, so you’re kind of limited by what PCIe can give you. When things go to the Arm side, these guys aren’t just saying they’re going to have a whole bunch of Arm cores and it’s just going to be CPUs. They say, ‘We’re doing this because there are custom functions that we want to do — maybe search algorithms or otherwise that we want to do more efficiently than we can with the x86 server with a whole bunch of PCIe cards.’ They’re innovating, but they’re innovating in the chip."

Topics: ARM semiconductor engineering arteris ip SoCs datacenters NoCs RISC-V ISA hardware acceleration Von Neumann architecture ISA

Semiconductor Engineering: Continuous Education For Engineers

Isabelle Geday, VP and GM of IP Deployment Division at Arteris IP is quoted in this new article in Semiconductor Engineering:

Continuous Education For Engineers

July 29th, 2021 - By Brian Bailey

Companies that invest in their employees' education often get rewarded with more productive and happier workers.


“Education of the market is virtuous,” says Isabelle Geday, VP and general manager of IP Deployment Division at Arteris IP. “Having this position understood by potential customers is a very good start for a relationship. They tend to trust us, not only from a technical point of view, but from a company point of view. When they perceive that we want them to be smarter — to be able to gain ownership of the standard, and of the solutions that come with the standard — that’s something that is really good for our image. It’s beneficial for them, and it’s also beneficial for us.”

Topics: semiconductor engineering arteris ip ip-xact Isabelle Geday IP Deployment Division education training sessions