Arteris Articles

Semiconductor Engineering: NoC Experiences From The Trenches

Kurt Shuler, Vice President of Marketing at Arteris IP authored this new article in Semiconductor Engineering:

NoC Experiences From The Trenches

September 28th, 2021 - By Kurt Shuler

When evaluating a new technology, don't aim for a simple 1-to-1 replacement.


Network-on-chip (NoC) interconnect as an alternative to traditional crossbars is already well-proven, but there are still plenty of design teams on the cusp of a transition or who maybe do not yet see a need for a change. As with a switch to any new technology, the first hurdles are often simply misconceptions. When new users first evaluate any new technology, they often make the mistake of attempting a 1-to-1 replacement of their old technology without considering all the new things the new capabilities bring to them.

Read on for some examples I have seen during my years at Arteris IP and check out our customer list, which includes the best-of-the-best in many domains implementing small to large designs.

Topics: Interconnect network-on-chip crossbar automotive FlexNoC semiconductor engineering arteris ip CPUs SoCs RTL kurt shuler chip design NoCs AI designs floorplanning

Semiconductor Engineering: Software-Hardware Co-Design Becomes Real

Michael Frank, Fellow and System Architect at Arteris IP is quoted in this new article in Semiconductor Engineering:

Software-Hardware Co-Design Becomes Real

September 27th, 2021 - By Brian Bailey

Automatic mapping of software onto existing hardware, or using software to drive hardware design, are highly desired but very difficult.


“Hardware/software co-design has been happening for quite a while,” says Michael Frank, fellow and system architect at Arteris IP. “People have been trying to estimate the behavior of the platform and evaluation its performance using real software for quite a while. The industry has been building better simulators, such as Gem5, and Qemu. This has extended into systems where accelerators have been included, where you build models of accelerators and offload your CPUs by running parts of the code on the accelerator."

Topics: Interconnect automotive semiconductor engineering arteris ip CPUs SoCs chip design AI/ML Michael Frank Gem5

SemiWiki: More Tales from the NoC Trenches

Bernard Murphy (SemiWiki), gets an update from Kurt Shuler, VP of Marketing and William Tseng, AE Manager at Arteris IP, about a few more misconceptions in early NoC evaluation. 

More Tales from the NoC Trenches

September 23, 2021 - Bernard Murphy

Science texts like to present the evolution of knowledge as step-function transitions, from ignorance to wisdom. We used to think the sun revolved around the earth. Then Galileo appeared, and we instantly realized that the earth revolves around the sun. But reality is always messier, as Galileo understood all too well. The transition from darkness to light is often bumpy. The same can be said for adopting new technologies. There may be mechanical challenges along the way, but the biggest barriers are often our own preconceptions. I talked to William Tseng (AE Manager) and Kurt Shuler (VP Marketing) at Arteris IP to share more tales from the trenches on this learning curve in NoC adoption. 
Topics: SoC NoC ISO 26262 network-on-chip semiconductor automotive mesh AI arteris ip semiwiki kurt shuler noc interconnect william tseng

Semiconductor Engineering: Data Explosion Pushes Boundaries of IC Interconnects

Benoit de Lescure, CTO at Arteris IP is quoted in this new article in Semiconductor Engineering:

Data Explosion Pushes Boundaries of IC Interconnects

September 22nd, 2021 - By Ann Steffora Mutschler

Design teams rethink the movement of data on-chip, off-chip, and between chips in a package.


“As chips become extremely large, the interconnect is touching all of the IP blocks in the chip. Benoit de Lescure, CTO at Arteris IP. “In this way, the interconnect is growing like the chip. Other components are not. A PCI controller will stay a PCI controller, but the interconnect size grows along with the size of the chip ,so there are scalability issues, especially because designing a good interconnect requires an understanding of how it will be implemented physically. How will it connect all those components on the chip? What amount of free space on the die will be left for the interconnect to use? What switch topology are you going to implement so that the physical aspects are easier later on? As the size of the problem grows bigger, it becomes significantly more difficult to come up with good interconnect decisions.”

Topics: Interconnect autonomous driving semiconductor engineering arteris ip Benoit de Lescure SoCs kurt shuler PHY scalability floorplan PCI controller switch topology D2D digital controller

EDN: How NoCs Ace Power Management and Functional Safety in SoCs

Benoit de Lescure, CTO at Arteris IP authors this 3rd article in a new series for EDN:

How NoCs Ace Power Management and Functional Safety in SoCs

September 15th, 2021 - By Benoit de Lescure

The NoC interconnect is the SoC architecture.

This third article highlights how NoC technology provides capabilities like power management and functional safety that are not possible with older crossbar-based interconnect technologies. For design teams creating modern SoCs, whether large datacenter AI accelerators or power-sipping IoT sensors, NoC interconnect technology is key to implementing these SoC architectures and optimizing the dataflow within them.

To catch up on the first and second articles in this series, click below:

Topics: ARM NIC-400 SoC NoC functional safety network-on-chip crossbar automotive AI arteris ip Benoit de Lescure interconnects EDN LBIST Design Management Power Management Semiconductors DVSF

Semiconductor Engineering: Long-Haul Trucking With Fewer Drivers

Kurt Shuler, Vice President of Marketing at Arteris IP is quoted in this new article in Semiconductor Engineering:

Long-Haul Trucking With Fewer Drivers

September 13th, 2021 - By Ann Steffora Mutschler

The economics are compelling, but technology challenges abound that are unique to this market.


Interestingly, when Intel-owned Mobileye started out with its technology, the first market was aftermarket selling to trucks. “The idea was that — and it was true — if you purchase this Mobileye system and install that in your fleet of trucks, your insurance would go down,” said Kurt Shuler, vice president of marketing at Arteris IP. “That was the value proposition, and it retrofitted these capabilities onto these trucks. There’s a lot of liability with these trucks when there’s an accident. That’s why companies like FedEx Ground, and Amazon, instead of doing like UPS and saying, ‘These trucks are part of our fleet. We own them,’ they’re independent contractors. And so if your Amazon delivery or your FedEx Ground delivery crashes at FedEx, it’s the responsibility of the contractor because of the liability around that. There are incentives in the economics for these kinds of things to add the capabilities.”

Topics: automotive ADAS mobileye ArterisIP autonomous driving semiconductor engineering arteris ip SoCs kurt shuler EDA autonomous trucking