EDN: NoCs and the transition to multi-die systems using chiplets

Monolithic dies have long been used in integrated circuit (IC) design, offering a compact and efficient solution for building application-specific integrated circuits (ASICs), application-specific standard parts (ASSPs) and systems-on-chip (SoCs). Traditionally favored for simplicity and cost-effectiveness, these single-die systems have driven the semiconductor industry’s advancements for decades.

However, as the demand for more powerful and versatile technology grows, the limitations of monolithic dies, particularly in terms of scalability and yield, become increasingly significant. This challenge has prompted a shift toward multi-die systems using chiplets.

Emerging trends in multi-die systems

The semiconductor industry is shifting toward multi-die architectures using chiplets to enable more flexible, scalable, and efficient designs. This transition involves a change in physical architecture and collaborative innovation among various ecosystem players to integrate diverse technologies into a single system.

Chiplets offer a modular approach to design, distributing different functionalities across multiple dies, which enhances yield and functional diversity. This method facilitates the integration of heterogeneous chiplets—such as digital logic implemented on a cutting-edge 5-nm process, with analog-to-digital converters (ADCs) and RF modules on larger, more cost-effective 16-nm and 28-nm processes.

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