Semiconductor Engineering: Challenges In Managing Chiplet Resources

The chip industry is exploring multiple avenues for simplifying multi-die integration, but difficulties remain for optimizing designs.

Managing chiplet resources is emerging as a significant and multi-faceted challenge as chiplets expand beyond the proprietary designs of large chipmakers and interact with other elements in a package or system.

Poor resource management in chiplets adds an entirely new dimension to the usual power, performance, and area tradeoffs. It can lead to performance bottlenecks, because as chiplets communicate across boundaries there inherently is more latency than within a single die. It also can drive up development costs, because each chiplet added to a system also adds complexity on multiple levels. And it can impact power consumption, which becomes more challenging to manage as the number of chiplets in a design increase and must continually communicate with each other.

The largest system and processor vendors have used this approach effectively, improving performance by adding more compute density and lowering costs by improving yield. But optimizing these systems using third-party chiplets is a much harder problem, and one that will require time to solve.

Misconceptions abound

Still, there is much work to do to make this all work. “When it comes to the interoperable chiplet marketplace, everybody’s talking about it, but it’s going to be a lot more difficult to achieve than many people realize,” said Ashley Stevens, director of product management at Arteris. “For the short term, we believe that if you’re not trying to achieve interoperability, then there isn’t really any additional benefit to a worldwide standard because you’re only interoperating with things that you’re doing yourself or with your close partners. The idea of interoperability is very attractive to many, but it’s going to take some time. Currently, whenever people design chiplet systems, they’re verifying those together before they go to silicon to check if it’s going to work, whereas what people are talking about now with an open chiplet marketplace is designing a chiplet, or there’s someone else designing a chiplet completely independently, then putting them together and expecting them to work.”

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