Semiconductor Engineering: Data Explosion Pushes Boundaries of IC Interconnects

by Madelyn Miller, On Sep 22, 2021

Benoit de Lescure, CTO at Arteris IP is quoted in this new article in Semiconductor Engineering:

Data Explosion Pushes Boundaries of IC Interconnects

September 22nd, 2021 – By Ann Steffora Mutschler

Design teams rethink the movement of data on-chip, off-chip, and between chips in a package.

“As chips become extremely large, the interconnect is touching all of the IP blocks in the chip. Benoit de Lescure, CTO at Arteris IP. “In this way, the interconnect is growing like the chip. Other components are not. A PCI controller will stay a PCI controller, but the interconnect size grows along with the size of the chip ,so there are scalability issues, especially because designing a good interconnect requires an understanding of how it will be implemented physically. How will it connect all those components on the chip? What amount of free space on the die will be left for the interconnect to use? What switch topology are you going to implement so that the physical aspects are easier later on? As the size of the problem grows bigger, it becomes significantly more difficult to come up with good interconnect decisions.”

 

To read the entire SemiEngineering article, please click here: https://semiengineering.com/data-explosion-pushes-boundaries-of-ic-interconnects/

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