Semiconductor Engineering: Streamlining SoC Design With Advanced IP And Integration Solutions
, Jun 27, 2024
An emphasis on physical awareness significantly reduces the iterative cycles of NoC placement and routing.
As system-on-chip (SoC) complexity grows, so does the necessity for products that seamlessly connect IP and streamline integration processes, minimize manual errors, and enhance productivity. The emphasis on physical awareness across solutions significantly reduces the iterative cycles of NoC placement and routing. By ensuring low latency and high efficiency, these advanced integration solutions meet stringent performance and power requirements, facilitating rapid development cycles and enabling SoC design teams to deliver cutting-edge applications quickly and reliably.
Arteris, a provider of system IP that accelerates SoC creation and integration, addresses the growing complexity of SoC designs with advanced products, including NoC IP and SoC integration automation software. Our NoC IP products support multiple processor IPs, such as Armv9 Cortex and RISC-V application processors from numerous vendors. Ensuring such compatibility is crucial for achieving high performance in complex SoCs. Arteris multi-protocol support allows seamless integration of IPs connected to the same NoC fabric, offering flexibility with fully coherent agent interfaces such as CHI-E, CHI-B, and ACE, IO-coherent interfaces such as ACE-Lite, and AXI for non-coherent sub-systems.
Ncore, FlexNoC, CodaCache, and Magillem Registers provide a comprehensive solution for modern SoC design, ensuring efficient integration of hardware components. Ncore’s cache coherent NoC IP supports low-latency integration of hardware accelerators. FlexNoC’s physical awareness capabilities enhance performance, lowering power consumption and decreasing die size. At the same time, CodaCache operates as a last-level cache (LLC) controller for FlexNoC, drastically increasing system performance compared to directly connected DRAM.
Magillem Registers automates the generation of the hardware/software interface (HSI), maintaining consistency across various components. These products streamline the SoC design process, enabling rapid development cycles and robust architecture.
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