The primary objective of any network-on-chip (NoC) interconnect is to move data around a chip as efficiently as possible with as little impact as possible on design closure while meeting or exceeding key design metrics (PPA, etc.). These networks have become the central nervous system of SoCs and are starting to play a larger role in system-level services like quality of service (QoS), debug, performance analysis, safety and security because these on-chip interconnects transport and “see” most if not all of the of the on-chip dataflow. Think of the NoC as the SoC’s “all seeing eye” and you’ll have a better understanding of what is technically possible.