Arteris Articles

Semiconductor Engineering: What Happened To Execute-In-Place?

Michael Frank, Fellow and Chief Architect at Arteris IP is quoted in this new article in Semiconductor Engineering:

What Happened To Execute-In-Place?

August 25th, 2020 - By Bryon Moyer

semiengineering-logo-2020The concept as it was originally conceived no longer applies. Here’s why.

“Demand-paging virtual memory is nothing else than a cache,” noted Michael Frank, fellow and chief architect at Arteris IP. But then Android came available for free, unlike the planned OSes. So the strategy changed from one of demand-paging to moving the entire code base from flash to DRAM, and then using the SRAM cache mechanism to further manage instruction access times — all in the interest of lower cost.
Frank also stated, “My definition of execute in place is where you do not have an address change, where you execute in a cached way, and your original source of the code or the data is still at the same address that you are executing at.”

To read the entire SemiEngineering article, please click here:

Topics: SoC NoC technology semiconductor engineering soc architecture AI cache DRAM noc interconnect IP market SRAM MCUs