Arteris Articles

Semiconductor Engineering: Choosing Between CCIX and CXL

by Madelyn Miller, on Wed, May 20, 2020 @ 09:00 AM

Kurt Shuler, vice president of marketing at Arteris IP participates in this Experts at the Table, Part 2 with Ed Sperling in this new Semiconductor Engineering article:

Choosing Between CCIX and CXL

May 19th, 2020 - By Ed Sperling

Experts at the Table, Part 2: What's right for one design may not be right for the next. Here's why.

Kurt Shuler, vice president of marketing at Arteris IP said, "When CCIX first came out, there was a lot of discussion about doing larger-scale, symmetric cache-coherent systems. But as you add in die or separate chips, and you have to increase memories and caches — and data for what’s going on in the different die, and locally storing that — there’s an architectural line where it doesn’t make much sense anymore. Are you actually losing more than you’re gaining? It’s really, really hard for architects to figure out where that hump is. Even if you have 20 years of experience as a cache-coherent architect, you can’t figure this out anymore in your head or by using Excel. That doesn’t work with CCIX and CXL".

To learn more, please click here for the Tech Talk CXL vs. CCIX video: https://www.arteris.com/blog/semiconductor-engineering-cxl-vs.-ccix-video

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Topics: SoC automotive CCIX NoC technology semiconductor engineering ADAS systems tech talk video kurt shuler noc interconnect CXL IP market asymmetric PHY cache coherent

Semiconductor Engineering: What Is SOTIF?

by Madelyn Miller, on Thu, Oct 25, 2018 @ 04:32 PM

Kurt Shuler, VP of Marketing at Arteris IP, discusses the new ISO/PRF PAS 21448 Safety of the Intended Functionality (SOTIF) specification in this new video with Ed Sperling of Semiconductor Engineering:

What Is SOTIF?

October 10th, 2018 - By Ed Sperling

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Topics: semiconductor semiconductor engineering arteris ip ADAS systems interconnects OEMs safety culture diagnostics

Semiconductor Engineering: Adding Safety Into Automotive Design

by Madelyn Miller, on Tue, Oct 16, 2018 @ 10:47 AM

Kurt Shuler, VP of Marketing at Arteris IP, comments on 'safety ready' or 'ASIL D ready' in this Semiconductor Engineering article:

Adding Safety Into Automotive Design

October 4th, 2018 - By Ann Steffora Mutschler

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Topics: semiconductor ISO 26262 ASIL D semiconductor engineering arteris ip ADAS systems interconnects OEMs safety culture

Semiconductor Engineering: Power Optimization Strategies Widen

by Madelyn Miller, on Thu, Jun 14, 2018 @ 02:00 AM

Benoit de Lescure, Sr. Director of Technology at Arteris IP, quoted in this Semiconductor Engineering article:

Power Optimization Strategies Widen

May 10th, 2018 - By Brian Bailey

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Topics: low power semiconductor engineering arteris ip cache car external memory ADAS systems complex doc

All Posts

Semiconductor Engineering: Choosing Between CCIX and CXL

Choosing Between CCIX and CXL

Semiconductor Engineering: What Is SOTIF?

What Is SOTIF?

Semiconductor Engineering: Adding Safety Into Automotive Design

Adding Safety Into Automotive Design

Semiconductor Engineering: Power Optimization Strategies Widen

Power Optimization Strategies Widen