Arteris Articles

EDN: The Network-on-Chip Interconnect is the SoC

Benoit de Lescure, CTO at Arteris IP authors this new series of articles in EDN:

The Network-on-Chip Interconnect is the SoC

March 25th, 2021 - By Benoit de Lescure

The NoC interconnect is the SoC architecture.

“The network is the computer,” coined by John Gage of Sun Microsystems back in 1984, proved incredibly insightful. This idea is re-emerging, this time within the SoC realm. Functions in a chip that communicate with each other—not through simple wires but through complex network elements such as switches, protocol converters, packetizers, and so on—are not so different from the set of computers communicating through a network within a cabinet, or a room, back in 1984.

Topics: SoC NoC AMBA network-on-chip automotive CPU AI arteris ip interconnects QoS DDR ic design EDN bus fabric

EE Times article, "Licensing Interconnect IP for Fun & Profit"

Kurt Shuler, VP Marketing at Arteris IP, authored this EE Times article discussing NoC interconnect Build or Buy.

February 25, 2021 - by Kurt Shuler

Why do we buy instead of build? Because the guys at the factory know what they’re doing.

The big question then becomes, which parts do we design in-house, and which do we bring in from outside? That’s a whiteboard architectural discussion, which can be heated and emotional. Engineers want to build stuff — that’s what they do. Managers want to get a working product out the door as economically as possible — that’s what they do. If the engineers want to make, and the managers want to buy, who wins? Who gets to make that call, and how do they justify the decision? 

Topics: SoC economics semiconductor eetimes AI SoCs RTL kurt shuler noc interconnect ML/AI SoC IP R&D costs buy vs build build vs buy

Semiconductor Engineering: Taming Non-Predictable Systems

Michael Frank, Fellow and System Architect at Arteris IP is quoted in this Semiconductor Engineering blog:

Taming Non-Predictable Systems

January 28th, 2021 - By Brian Bailey

The non-predictable nature of most systems is not inherently bad, so long as it is understood and bounded — but that’s becoming a bigger challenge.

“Real-time is a ‘stretchable’ term,” says Michael Frank, fellow and system architect at Arteris IP. “In general, it implies that a certain action is completed within a bounded time, with 100 % probability, as opposed to engineering schedules. For most real-time systems, the definition is not that strict. Some systems are fine if the average is within a certain window that meets the requirement, such as for video decoding. Other cases may look to see if the deadline will only be missed with a certain low random probability. Those systems may replace a missing result by a prediction/interpolation, such as dropped audio samples.”

Topics: SoC NoC network-on-chip semiconductor engineering AI verification real-time systems Michael Frank

Semiconductor Engineering: Roaring '20s For The Chip Industry

Isabelle Geday, Vice President and General Manager for the IP Deployment Division at Arteris IP is quoted in today's Semiconductor Engineering blog:

Roaring '20s For The Chip Industry

January 28th, 2021 - By Brian Bailey

New markets, different architectures, and continued virtual work environments all point to positive and sustained growth.

These advanced technologies are changing the fabric of the industry. “Foundries will keep offering more and more design services,” says Isabelle Geday, vice president and general manager for the IP Deployment Division of Arteris IP. “They will become super design houses to help integration within the value chain for many system houses and Tier 2 IC companies.”

Topics: SoC NoC network-on-chip semiconductor engineering AI chiplets EDA Isabelle Geday IP Deployment Division china start ups chip industry design houses cpu hardware ip