Arteris Articles

Semiconductor Engineering: NoCs In Authoritative MPSoC Reference

Kurt Shuler, Vice President of Marketing at Arteris IP authored this new article in Semiconductor Engineering:

NoCs In Authoritative MPSoC Reference

May 6th, 2021 - By Kurt Shuler

The role of the network-on-chip in ensuring total system safety.

K. Charles Janac, president and CEO of Arteris IP, authored the first chapter in that third section on network-on-chip (NoC) architecture and how it has enabled MPSoCs. 

The chapter starts with the evolution from buses to crossbars to NoCs. Next is a useful overview of a typical approach to architecting and configuring a NoC. As the most configurable intellectual property (IP) in an SoC, getting the design to an optimal solution requires careful planning and refinement. The design evolves, not just the logic but also the topology.

By the way, this book is a technical review, not a marketing pitch. Charlie is quite open that while NoCs share some concepts with “regular” communications networks, the analogy cannot be stretched too far. NoC design is still very much an activity for semiconductor designers, not general network designers.

Topics: SoC NoC functional safety network-on-chip ECC cache coherency IEEE semiconductor engineering arteris ip ASIL D K. Charles Janac interconnects kurt shuler ai accelerators security TMR MPSOC LBIST

Semiconductor Engineering: Interconnect Challenges Grow, Tools Lag

Benoit de Lescure, CTO at Arteris IP comments in this new Semiconductor Engineering article:

Interconnect Challenges Grow, Tools Lag 

June 15th, 2020 - By Brian Bailey

More data, smaller devices are hitting the limits of current technology. The fix may be expensive. 
Chips are growing. “Ten years ago, the interconnect would be concerned with about 10K gates,” says Benoit de Lescure, CTO for Arteris IP. “Now they need to interconnect 10M gates on a chip, so there’s been a very significant increase in complexity. The number of clients on the interconnect has increased.”
Topics: SoC NoC technology semiconductor engineering Benoit de Lescure CTO broadcast noc interconnect ai accelerators IP market networking chips multicast