Arteris Articles

Semiconductor Engineering: Software-Hardware Co-Design Becomes Real

Michael Frank, Fellow and System Architect at Arteris IP is quoted in this new article in Semiconductor Engineering:

Software-Hardware Co-Design Becomes Real

September 27th, 2021 - By Brian Bailey

Automatic mapping of software onto existing hardware, or using software to drive hardware design, are highly desired but very difficult.

“Hardware/software co-design has been happening for quite a while,” says Michael Frank, fellow and system architect at Arteris IP. “People have been trying to estimate the behavior of the platform and evaluation its performance using real software for quite a while. The industry has been building better simulators, such as Gem5, and Qemu. This has extended into systems where accelerators have been included, where you build models of accelerators and offload your CPUs by running parts of the code on the accelerator."

Topics: Interconnect automotive semiconductor engineering arteris ip CPUs SoCs chip design AI/ML Michael Frank Gem5

SemiWiki: The Zen of Auto Safety - a Path to Enlightenment

Kurt Shuler, VP of Marketing and Stefano Lorenzini, Functional Safety Manager at Arteris IP, share stories with Bernard Murphy (SemiWiki) to help you chill. Safety is critical, but that’s doesn't mean you have to panic. 

The Zen of Auto-Safety - a Path to Enlightenment

July 7, 2021 - Bernard Murphy

Safety is a complex topic, but we’re busy. We take the course, get the certificate. Check, along with a million other things we need to do. But maybe it’s not quite that simple. I talked recently with Kurt Shuler (VP of marketing) and Stefano Lorenzini (functional safety manager) at Arteris IP and concluded that finding enlightenment in safety is more of a journey than a destination. I’m going to share with you a few stories they told me which highlight this journey. Because journeys / stories are my favorite way to share an idea.
Topics: SoC NoC network-on-chip semiconductor automotive arteris ip semiwiki functional safety manager RTL FMEDA noc interconnect hybrid AI SoCs Tier 1s AI/ML AoU assumptions of use

Semiconductor Engineering: Automotive AI Hardware: A New Breed

Kurt Shuler, Vice President of Marketing at Arteris IP authored this new article in Semiconductor Engineering:

Automotive AI Hardware: A New Breed

June 3rd, 2021 - By Kurt Shuler

What sets automotive apart from the conventional wisdom on AI hardware markets.

Arteris IP functional safety manager Stefano Lorenzini recently presented “Automotive Systems-on-Chip (SoCs) with AI/ML and Functional Safety” at the Linley Processor Conference. A main point of the presentation was that conventional wisdom on AI hardware markets is binary. There’s AI in the cloud: Big, power-hungry, general-purpose. And there’s AI at the edge: Small, low power, limited application-specific features. Automotive AI doesn’t really fit into either category. To power ADAS and autonomous driving functions, these chips are extremely application-specific and require more performance than typical edge AI, are low power but not as low as IoT chips at the edge, and must be as low cost as possible. They also add a new angle – low latency because safety demands fast and deterministic response times. Add to all that the functional safety requirements demanded by ISO 26262 – inside the AI structure as much as everywhere else. Bottom line: Automotive AI SoC architectures are unique beasts.

Topics: SoC NoC functional safety network-on-chip automotive ECC The Linley Group ISO 26262 compliance semiconductor engineering arteris ip interconnects kurt shuler AI SoCs AI/ML Stefano Lorenzini heterogeneous socs ASIL

SemiWiki: IP-XACT Resurgence, Design Enterprise Catching Up

Isabelle Geday, VP & GM of the new IP Deployment Division at Arteris IP, gives Bernard Murphy (SemiWiki) insight into some motivations driving companies to switch to IP-XACT.

IP-XACT Resurgence, Design Enterprise Catching Up

June 3, 2021 - Bernard Murphy

This standard has been around in one form or another for over ten years and was then arguably ahead of its time. RTL designers were confused: ‘We already have RTL. Why do we need something else?’ I also didn’t get it. Still, the standard plugged ahead among the faithful and found traction among IP vendors. Particularly as a common format to distribute non-RTL data, like register maps. But a lot has been changing in the meantime. Faster moving competitors. More horizontal and vertical dependencies. Mergers and acquisitions. Chinese technology growth and competition. To adapt, some top-tier organizations have already fully embraced IP-XACT, others are now racing to catch up. Why? Rather than making a dry technical case, I’ll share a few real examples (no names).
Topics: SoC NoC network-on-chip semiconductor arteris ip semiwiki ip-xact RTL noc interconnect AI SoCs Isabelle Geday AI/ML IPD