by Madelyn Miller, on Mon, Sep 17, 2018 @ 05:54 PM
Holger Keding (Synopsys' Solutions Architect), Rocco Jonack (Arteris' Senior Solutions Architect) and Malte Doerper (Synopsys' Product Marketing) will be jointly hosting this webinar,
"Optimization of Cache Coherent Interconnects for Artificial Intelligence SoCs",
on Wednesday, 26 September, at 10 am Pacific time.
News and original writing about on-chip interconnects, on-chip communications and the semiconductor intellectual property ("semi IP") industry.
Arteris IP HQ
595 Millich Dr Suite 200
Campbell, CA 95008 USA
+1 408 470 7300
Contact: Sales_Americas@Arteris.com
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Austin, TX 78729 USA
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Contact: Sales_EMEAI@Arteris.com
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Contact: Sales_EMEAI@Arteris.com
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Seongnam-si, Gyeonggi-do,
Seoul 13494 KOREA
+82 (10) 4704 9526
Contact: Sales_Korea@Arteris.com
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JiangBei New District
Nanjing, China, 210038
安通思半导体技术（南京）有限公司
江苏省南京市江北新区星火路15号智芯科技大厦综合楼（创芯孵化器）310室
邮编：210038
Contact: Sales_Greater_China@Arteris.com
+86 25 58355692
Arteris IP KK (Japan)
#402, 2-10-15 Shibuya, Shibuya-ku
Tokyo JAPAN 150-0002
Contact: Sales_Japan@Arteris.com
+81 3 4405 0399
