by Madelyn Miller, on Mon, Sep 17, 2018 @ 05:54 PM
Holger Keding (Synopsys' Solutions Architect), Rocco Jonack (Arteris' Senior Solutions Architect) and Malte Doerper (Synopsys' Product Marketing) will be jointly hosting this webinar,
"Optimization of Cache Coherent Interconnects for Artificial Intelligence SoCs",
on Wednesday, 26 September, at 10 am Pacific time.
News and original writing about on-chip interconnects, on-chip communications and the semiconductor intellectual property ("semi IP") industry.
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Contact: greater.china@arteris.com
+86 25 58355692
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Contact: japan_sales@arteris.com
+81 3 4405 0399
