Arteris Articles

Semiconductor Engineering: Virtualization In The Car

Stefano Lorenzini, Functional Safety Manager at Arteris IP is quoted in this new article in Semiconductor Engineering:

Virtualization In The Car

August 6th, 2020 - By Ann Steffora Mutschler

How and why abstraction layers are becoming essential in automotive design.

 
“It’s a way to create multiple virtual instantiations of the same hardware, and every instance is virtually dedicated to a specific product or software or application,” said Stefano Lorenzini, functional safety manager at Arteris IP . “The hypervisor is a bare-metal operating system that runs directly on the hardware and creates an intermediate layer with respect to other application or software programs that are running on top. So if you want to look to the architecture from the top to the bottom, you see the application, then you see the hypervisor, and then you see the hardware layer. The hypervisor is the thing that creates this illusion to the application that every resource of the SoC is dedicated to them.”
 
Topics: SoC automotive autonomous vehicles NoC technology semiconductor engineering soc architecture AI ASIL D functional safety manager noc interconnect IP market automotive electronics

Semiconductor Engineering: Winners and Losers At The Edge

Kurt Shuler, Vice President of Marketing at Arteris IP comments in this new article in Semiconductor Engineering:

Winners and Losers At The Edge

July 7th, 2020 - By Ed Sperling

No company owns this market yet — and won’t for a very long time. 

 
 
“Everything is use-case based when designing the NoC,” said Kurt Shuler, vice president of marketing at  Arteris IP . “You’ve got to understand what the use case is to be able to size up that NoC. There are two aspects of this. One is in the creation of that network on chip and the configuration of it, and what gets burned into the chip. The other step is, once you’ve created all the roads — they’re this long or this wide — that’s it.
 
Topics: SoC automotive NoC technology semiconductor engineering AI kurt shuler noc interconnect ML IP market

Semiconductor Engineering: Variables Complicate Safety-Critical Device Verification

Kurt Shuler, Vice President of Marketing at Arteris IP participates in this new "Experts at the Table" article in Semiconductor Engineering:

Variables Complicate Safety-Critical Device Verification 

July 1st, 2020 - By Ann Steffora Mutschler

What's the best way to approach designs like AI chips for automotive that can stand the test of time? 

 
SE: Where does the industry stand with the task of verifying safety-critical devices today?
 
Kurt Shuler responds, "At the chip level we still have a situation where the verification people and methodologies are separate from the functional safety people and methodologies. This results in some overlap and rework. As tools and data interchange standards (like IEEE P2851 being led by both IEEE and Accellera) mature, we’ll be able to have more automation where functional safety validation through fault injection can be executed as part of regular verification processes. This will help everyone in the industry have more confidence that products don’t regress in diagnostic coverage as new versions are developed and will provide integrators/users of safety-critical systems to more easily perform fault injection validation of safety mechanisms if they desire."
 
Topics: SoC ISO 26262 automotive NoC technology semiconductor engineering ASIL D AI chips noc interconnect IP market IEEE P2851 fault injection

Semiconductor Engineering: Aging Problems at 5nm and Below

Kurt Shuler, vice president of marketing at Arteris IP comments in this new Semiconductor Engineering article:

Aging Problems at 5 nm and Below 

June 11th, 2020 - By Brian Bailey

Semiconductor aging has moved from being a foundry issue to a user problem. As we get to 5nm and below, vectorless methodologies become too inaccurate. 
 
“The problem is that if somebody is doing their own chip, their own software in their own device, they have all the information they need to know, down to the transistor level, what that duty cycle is,” says Kurt Shuler, vice president of marketing at  Arteris IP . “But if you are creating a chip that other people will create software for, or if you’re providing a whole SDK and they’re modifying it, then you don’t really know. Those chip vendors have to provide to their customers some means to do that analysis.”
 
Topics: SoC automotive NoC technology semiconductor engineering kurt shuler noc interconnect IP market canary cells AI algorithms