Arteris Articles

Semiconductor Engineering: Von Neumann Is Struggling

Michael Frank, Fellow and System Architect at Arteris IP is quoted in today's Semiconductor Engineering blog:

Von Neumann Is Struggling

January 18th, 2021 - By Brian Bailey

The backbone of computing architecture for 75 years is being supplanted by more efficient, less general compute architecture.

“One of the problems is that CPUs are not really good at anything,” says Michael Frank, fellow and system architect at Arteris IP. “CPUs are good at processing a single thread that has a lot of decisions in it. That is why you have branch predictors, and they have been the subject of research for many years.”

Topics: SoC Interconnect NoC network-on-chip memory CPU neural networks semiconductor engineering accelerators chip architectures

Semiconductor Engineering: Top-Tech Videos of 2020

3 Arteris IP tech videos among most viewed on Semiconductor Engineering

Top Tech Videos of 2020 

January 6th, 2021 - By Linda Christensen

What engineers were watching in 2020. 

 

View these 3 Arteris IP Videos included in the top 68 most viewed:

AI/ML:
Changes in AI SoCs discusses the tradeoffs in AI chips in the data center and in edge devices.

Automotive:
Who Owns A Car's Chip Architecture
looks at the competitive battle brewing between OEMs and Tier 1s.

Architectures, New Standards and More:
CXL Vs. CCIX
explains how these two standards differ, which ones works best where, and what each was designed for.

For more content, please visit our Resources page. 

Topics: SoC Interconnect NoC automotive CCIX semiconductor engineering soc architecture kurt shuler chip architectures AI SoCs CXL AI/ML

Semiconductor Engineering: CEO Outlook: 2021

K. Charles Janac, President and CEO of Arteris IP comments in today's Semiconductor Engineering blog:

CEO Outlook: 2021 

January 4th, 2021 - By Ed Sperling

The semiconductor industry will look and behave differently this year, and not just because of the pandemic.


"Chiplets will become increasingly important", said K. Charles Janac, president and CEO of Arteris IP. "Some will be for specific functions. Some will require specialized processors. But to make all of this work, the interconnects will need to become even more sophisticated than they are today. The good thing about the interconnect is there are almost unlimited innovation possibilities. There are a lot of ways to add value.”

Topics: SoC Interconnect NoC automotive semiconductor engineering K. Charles Janac chiplets chip architectures hard ip blocks chipmakers

Semiconductor Engineering: AI: Where's The Money?

 Arteris IP's Kurt Shuler, Vice President of Marketing, authored this article in Semiconductor Engineering about Artificial Intelligence (AI), and asks what is hype and what is reality?

AI: Where's The Money?

March 7th, 2019 - By Kurt Shuler

What the market for AI hardware might look like in 2025.

A one-time technology outcast, Artificial Intelligence (AI) has come a long way. Now there's groundswell of interest and investment in products and technologies to deliver his performance visual recognition, matching or besting human skills. We're overwhelmed by possibilities, but what is often less clear is where the money is really going. What is aspiration, what is hype and what is reality?

There are multiple ways to slice this question, such as dividing by applications or implementation choices. At Arteris IP, we have a unique view because our interconnect technology is used in many custom AI designs which, as we’ll see, are likely to dominate the space. Combining this view with recent McKinsey analyses provides some interesting and, in some cases, surprising insights.

Bottom line: AI is big, but there is no such thing as a “standard AI chip.” Optimal chip architectures differ according to the types of functions that must be executed, where they must be performed, and within what amount of time and power budget.

For more information on AI, please click on the Arteris FlexNoC AI Package webpage: http://www.arteris.com/flexnoc-ai-package.

Topics: SoC functional safety automotive semiconductor engineering AI noc interconnect chip architectures datacenters