Arteris Articles

Design & Reuse: Traceability for Embedded Systems

Paul Graykowski, Senior Technical Marketing Manager at Arteris IP authored this Design & Reuse article:

Traceability for Embedded Systems

February 3rd, 2022 - By Paul Graykowski

Maintaining connection between requirements and implementation is where traceability for embedded systems can show value. 

 

In an embedded system, the hardware/software interface (HSI) is a representation of requirements between hardware and software development teams. This description elaborates a huge wealth of detail in memory and IP register offsets, bitfields and detailed behavior specifications. In this representation, at least some aspects must be met precisely. This expectation is especially important because many designs must work with legacy software, not only to minimize development time but also to preserve reliability. A new device replacing one from a different vendor must often mirror all or most of the original HSI. In this context, capturing those requirements and using traceability to track compliance through development becomes a clear advantage.

To learn more about traceability and Arteris Harmony Trace, please download this technical paper: https://www.arteris.com/download-reinventing-traceability-arteris-harmony-trace-paper

Topics: network-on-chip arteris ip verification SoCs RTL UVM compliance EDA traceability NoCs Arteris IP (AIP) validation Arteris Harmony Trace Paul Graykowski Design&Reuse HSI

Semiconductor Engineering: Verification Signoff Beyond Coverage

Paul Graykowski, Senior Technical Marketing Manager at Arteris IP authored this Semiconductor Engineering article:

Verification Signoff Beyond Coverage

February 3rd, 2022 - By Paul Graykowski

Ensuring implementation and verification match the customer's requirements.


A common design view of verification signoff is to start with a comprehensive verification plan, covering every requirement defined among specifications and use-cases, the architectural definition, and any other relevant documents. Tests are then developed to cover every feature of the verification plan. Those tests are run and debugged, and identified issues are addressed within the design. This process iterates until the agreed level of coverage is met. Functional coverage is the metric by which this process is gauged, and it works well within its scope. The major electronic design automation (EDA) vendors have tools to run simulations, accumulate coverage statistics, and help further advance those metrics. But this is not the whole story in signoff.

To learn more about traceability and Arteris Harmony Trace, please download this technical paper: https://www.arteris.com/download-reinventing-traceability-arteris-harmony-trace-paper

Topics: network-on-chip automotive semiconductor engineering arteris ip verification SoCs compliance EDA traceability NoCs Arteris IP (AIP) validation Arteris Harmony Trace Paul Graykowski

SemiWiki: Business Considerations in Traceability

Bernard Murphy (SemiWiki) gets an update from Arteris IP on why businesses may be increasing pushed to support traceability.

Business Considerations in Traceability 

January 26, 2022 - Bernard Murphy

Traceability as an emerging debate around hardware is gaining a lot of traction. As a reminder, traceability is the need to support a disciplined ability to trace from initial OEM requirements down through the value chain to implementation support and confirmed verification in software and hardware. Demand for traceability appears most commonly in safety-critical applications, from automotive and rail to mil-aero. In process industries such as petroleum, petrochemical and pharmaceutical, to power plants and machinery safety-related controls. And that’s just established applications. The more we push the IoT envelope, Industry 4.0, smart cities and homes, the more cannot-fail products we will inevitably create. Safety, reliability, regulations and even simply managing complex and varied requirements from customers have implications for traceability support.
 
To learn more, click HERE.
Topics: SoC NoC network-on-chip semiconductor automotive arteris ip semiwiki ip-xact compliance noc interconnect design teams Arteris IP Harmony Trace Paul Graykowski Jama software ISO 14971

SemiWiki: Traceability and ISO 26262

Bernard Murphy (SemiWiki) and Kurt Shuler, VP of Marketing at Arteris IP, talk about the growing importance of traceability to ISO 26262 and safety.

Traceability and ISO 26262

November 29, 2021 - Bernard Murphy

Since traceability and its relationship to ISO 26262 may be an unfamiliar topic for many of my readers, I thought it might be useful to spend some time on why this area is important. What is the motivation behind a need for traceability in support of automotive systems development? The classic verification and validation V-diagram is a useful starting point for understanding. The left arm of the V decomposes system design from concepts into requirements, architecture, and detailed design. The right arm represents verification and validation steps from unit testing all the way up to full system validation. Tracing compliance with requirements through this full flow requires new kinds of automation.
 
To learn more, click HERE.
Topics: SoC NoC ISO 26262 network-on-chip semiconductor automotive arteris ip semiwiki ip-xact kurt shuler compliance noc interconnect design teams Arteris IP Harmony Trace ISO 26262 auditors