Arteris Articles

Semiconductor Engineering: Sweeping Changes Ahead For Systems Design

Kurt Shuler Vice President of Marketing at Arteris IP is quoted in this new article in Semiconductor Engineering:

Sweeping Changes Ahead For Systems Design

July 29th, 2021 - By Ann Steffora Mutschler

Demand for faster processing with increasingly diverse applications is prompting very different models.


“It’s not about the hardware instruction set architecture,” said Kurt Shuler, vice president of marketing at Arteris IP. “It’s about the software for the hardware instruction set architecture. This is why if you look at the x86 ISA, one of the reasons it’s still around today is because so much software has been created for it. With Arm, and others, you’ve had to create this stuff in it. Once it reaches a certain inflection point, things go nonlinear. I don’t know that we’re there just yet, but things are getting there. A shift is happening, and what this means, big picture, is that in terms of integration of companion chips to these x86 chips, generally they’re not in the same package because it’s an Intel chip product oftentimes going into an Intel or AMD motherboard. Then there is a PCIe card with the accelerator, so you’re kind of limited by what PCIe can give you. When things go to the Arm side, these guys aren’t just saying they’re going to have a whole bunch of Arm cores and it’s just going to be CPUs. They say, ‘We’re doing this because there are custom functions that we want to do — maybe search algorithms or otherwise that we want to do more efficiently than we can with the x86 server with a whole bunch of PCIe cards.’ They’re innovating, but they’re innovating in the chip."

Topics: ARM semiconductor engineering arteris ip SoCs datacenters NoCs RISC-V ISA hardware acceleration Von Neumann architecture ISA

Semiconductor Engineering: Shifting Toward Data-Driven Chip Architectures

K. Charles Janac, CEO at Arteris IP is quoted in this new article in Semiconductor Engineering:

Shifting Toward Data-Driven Chip Architectures

June 16th, 2021 - By Ed Sperling and Ann Steffora Mutschler

Rethinking how to improve performance and lower power in semiconductors.

“There are dynamic routing opportunities at runtime,” said K. Charles Janac, chairman and CEO of Arteris IP. “We’ve always resisted runtime dynamic routing because there are issues with verification. If you have billions of transactions, the verification is much simpler if you’re forcing the traffic to go onto a single connection every time. But there are opportunities for easing that in the future and have the NoC essentially be able to reroute traffic dynamically based on some sort of routing controller, which in turn is controlled by some global software."

Topics: SoC NoC network-on-chip automotive machine learning semiconductor engineering arteris ip verification K. Charles Janac interconnects datacenters

Semiconductor Engineering: IC Security Threat Grows As More Devices Are Connected

Guillaume Boillet, Director of Product Management at Arteris IP is quoted in this new article in Semiconductor Engineering:

IC Security Threat Grows As More Devices Are Connected 

May 6th, 2021 - By Ann Steffora Mutschler

Awareness increases, but so does the complexity of systems and the potential attack surface.

 “We would expect this industry to be adopting cloud-based software-as-a-service massively, but the reality is different,” said Guillaume Boillet, director of product management at Arteris IP. “The design environment itself is almost always in a customer-owned data center. There has been some push to leverage the benefits of the cloud, and of course it’s very appealing because now you can scale your data centers. But I don’t have an example where, all of a sudden, you’ve got a need for more computing power and you would rather rely on the cloud than build a rack. This is not happening for multiple reasons. One, people are very protective of their IP, of what they’re doing, so it’s been an hindrance for us in terms of support, etc. Also, moving to the SaaS model requires a total rethink of the licensing, because it’s a totally different monetization scheme. I’ve seen examples where this scenario would have required a lot of work and a lot of revamping of the toolset.”

Topics: SoC NoC network-on-chip semiconductor engineering arteris ip interconnects datacenters security Guillaume Boillet ecosystem security

Semiconductor Engineering: AI: Where's The Money?

 Arteris IP's Kurt Shuler, Vice President of Marketing, authored this article in Semiconductor Engineering about Artificial Intelligence (AI), and asks what is hype and what is reality?

AI: Where's The Money?

March 7th, 2019 - By Kurt Shuler

What the market for AI hardware might look like in 2025.

A one-time technology outcast, Artificial Intelligence (AI) has come a long way. Now there's groundswell of interest and investment in products and technologies to deliver his performance visual recognition, matching or besting human skills. We're overwhelmed by possibilities, but what is often less clear is where the money is really going. What is aspiration, what is hype and what is reality?

There are multiple ways to slice this question, such as dividing by applications or implementation choices. At Arteris IP, we have a unique view because our interconnect technology is used in many custom AI designs which, as we’ll see, are likely to dominate the space. Combining this view with recent McKinsey analyses provides some interesting and, in some cases, surprising insights.

Bottom line: AI is big, but there is no such thing as a “standard AI chip.” Optimal chip architectures differ according to the types of functions that must be executed, where they must be performed, and within what amount of time and power budget.

For more information on AI, please click on the Arteris FlexNoC AI Package webpage: http://www.arteris.com/flexnoc-ai-package.

Topics: SoC functional safety automotive semiconductor engineering AI noc interconnect chip architectures datacenters