Arteris Articles

SemiWiki: SoC Integration - Predictable, Repeatable, Scalable

Bernard Murphy (SemiWiki) gets an update from Kurt Shuler, vice president of Marketing at Arteris IP on the benefits of integrating SoC data and NoC integration. 

SoC Integration - Predictable, Repeatable, Scalable

March 24th, 2021 - Bernard Murphy

On its face System-on-chip (SoC) integration doesn’t seem so hard. You gather and configure all the intellectual properties (IPs) you’re going to need, then stitch them together. Something you could delegate to new college hires, maybe? But it isn’t that simple. What makes SoC integration challenging is that there are so many parts including IPs and connections. Some are moving parts, changing as bugs are fixed. Some, like the interconnect, can only be completely defined when you integrate. There’s a lot of interdependence between these parts. Make a small change like importing a new revision of an IP or adapting to a spec tweak, and the consequences can ripple through your integration, not a big deal, perhaps, early in design. But a very big deal when you’ve finally wrestled hundreds of IPs and tens of thousands of connections into behaving. Then you have to drop in a couple more changes. Surely there’s a better way? Kurt Shuler shares his views on the need.
Topics: SoC NoC network-on-chip semiconductor FlexNoC semiwiki safety XML ip-xact magillem kurt shuler QoS noc interconnect EDA data integration traceability configuration software interface documentation enterprise

Semiconductor Engineering: Roaring '20s For The Chip Industry

Isabelle Geday, Vice President and General Manager for the IP Deployment Division at Arteris IP is quoted in today's Semiconductor Engineering blog:

Roaring '20s For The Chip Industry

January 28th, 2021 - By Brian Bailey

New markets, different architectures, and continued virtual work environments all point to positive and sustained growth.

These advanced technologies are changing the fabric of the industry. “Foundries will keep offering more and more design services,” says Isabelle Geday, vice president and general manager for the IP Deployment Division of Arteris IP. “They will become super design houses to help integration within the value chain for many system houses and Tier 2 IC companies.”

Topics: SoC NoC network-on-chip semiconductor engineering AI chiplets EDA Isabelle Geday IP Deployment Division china start ups chip industry design houses cpu hardware ip

Arteris IP is Now Hiring a Director of Software Development

This is a New Featured Position!

 Director of Software Development in Campbell, CA

Would you like to be part of a team contributing to products that will be used in the next-generation of advanced smartphones, automobiles and other computing devices?

This management position reporting to the VP of Engineering requires a dynamic and self-motivated individual with excellent organizational, and technical skills who can effectively communicate across all levels of management. The ideal candidate will be an experienced leader who is visionary, strategic, technology savvy and skilled in contemporary software technologies and architectures. You will own and drive both development and quality engineering across multiple development teams.

Topics: software jobs arteris ip noc interconnect job SoC designs C++ Java leader IP design EDA director

Arteris IP is Hiring a Senior Software Engineering Manager in Campbell, CA!

Featured Position!

Senior Software Engineering Manager in Campbell, CA

Would you like to be part of a team contributing to products that will be used in the next-generation of advanced smartphones, automobiles and other computing devices?

This management position reporting to the VP of Engineering requires a dynamic and self-motivated individual with excellent organizational, and technical skills who can effectively communicate across all levels of management. The ideal candidate will be an experienced leader who is visionary, strategic, technology savvy and skilled in contemporary software technologies and architectures. You will own and drive both development and quality engineering across multiple development teams.

Topics: software jobs arteris ip noc interconnect job SoC designs C++ Java leader IP design EDA