Arteris Articles

Semiconductor Engineering: Where Do Memory Maps Come From?

Guillaume Boillet, Senior Director of Product Management at Arteris IP authored this Semiconductor Engineering article:

Where Do Memory Maps Come From?

March 3rd, 2022 - By Guillaume Boillet

Ensuring software can accurately address hardware.


A memory map is the bridge between a system-on-chip (SoC) and the firmware and software that is executed on it. Engineers may assume the map automatically appears, but the reality is much more involved. The union of hardware (HW) and software (SW) demands both planning and compromise. The outcome of this merger will not be fully realized until the magical day when the system comes to life.

To learn more about SoC and Hardware/Software Interface (HSI) Development, please download this datasheet:  SoC & Hardware / Software Interface (HSI) Development Datasheet 

 

Topics: software network-on-chip power time to market semiconductor engineering arteris ip hardware SoCs EDA Guillaume Boillet NoCs Arteris IP (AIP) HSI addresses embedded firmware memory map

Semiconductor Engineering: Power Optimization: What's Next?

Guillaume Boillet, Director of Product Management at Arteris IP is quoted in this new article in Semiconductor Engineering:

Power Optimization: What's Next!

May 17th, 2021 - By Brian Bailey

Clock gating and power gating were a good start, but there is much more that can and should be done to minimize power.

“The efforts in terms of methodology, compute resources and engineering talent to deploy system-level techniques are definitely non-negligible,” says Guillaume Boillet, director of product management for Arteris IP. “Only the most advanced and power-savvy design teams invest in those.”

Topics: SoC NoC network-on-chip dynamic power machine learning semiconductor engineering arteris ip interconnects RTL Guillaume Boillet clock-gating macro-level

Semiconductor Engineering: IC Security Threat Grows As More Devices Are Connected

Guillaume Boillet, Director of Product Management at Arteris IP is quoted in this new article in Semiconductor Engineering:

IC Security Threat Grows As More Devices Are Connected 

May 6th, 2021 - By Ann Steffora Mutschler

Awareness increases, but so does the complexity of systems and the potential attack surface.

 “We would expect this industry to be adopting cloud-based software-as-a-service massively, but the reality is different,” said Guillaume Boillet, director of product management at Arteris IP. “The design environment itself is almost always in a customer-owned data center. There has been some push to leverage the benefits of the cloud, and of course it’s very appealing because now you can scale your data centers. But I don’t have an example where, all of a sudden, you’ve got a need for more computing power and you would rather rely on the cloud than build a rack. This is not happening for multiple reasons. One, people are very protective of their IP, of what they’re doing, so it’s been an hindrance for us in terms of support, etc. Also, moving to the SaaS model requires a total rethink of the licensing, because it’s a totally different monetization scheme. I’ve seen examples where this scenario would have required a lot of work and a lot of revamping of the toolset.”

Topics: SoC NoC network-on-chip semiconductor engineering arteris ip interconnects datacenters security Guillaume Boillet ecosystem security