Arteris Articles

What Does It Cost You When Your SoC is Late to Market?

If your chip is late to market, it is costing you far more than you know.

Topics: SoC interconnect IP interchip connectivity Late Market Cost chip design

Interchip Connectivity: C2C, MIPI LLI and the path to 3D IC and TSV

It may seem strange to link two interchip interface standards to the future of 3D integrated circuits, but please bear with me for a few minutes. I hope to prove that the learning from today will impact how we design SoCs in the near future.

Topics: C2C interchip connectivity MIPI LLI 3D IC TSV


Two new options for interchip connectivity are available today that enable sharing a DRAM memory between two chips for data and programs. These standards, called MIPI Low Latency Interface (MIPI LLI) and Chip-to-Chip (C2C), are primarily targeted at mobile phones, where a mobile phone’s modem usually requires its own discreet DRAM. With either C2C or MIPI LLI, the mobile phone modem can use the application processor’s DRAM though a low-latency, memory-mapped connection that requires no software drivers or runtime software.

Topics: IP C2C LLI interchip connectivity MIPI LLI

Interchip Connectivity: HSIC, UniPro, HSI, C2C, LLI...oh my!

There has been a lot of confusion about the different standards for interchip connectivity, with many hardware developers of consumer electronics and mobile computing systems-on-chip wondering what to use. As an interconnect IP provider, I struggle with this every day when working with our customers. I wrote this article to share what I have learned.

Topics: MIPI UniPro MIPI HSI USB HSIC C2C LLI System-on-Chip interchip connectivity MIPI LLI