Arteris Articles

Semiconductor Engineering: SoC Integration Complexity: Size Doesn't (Always) Matter

Kurt Shuler, Vice President of Marketing at Arteris IP authored this new Semiconductor Engineering article:

SoC Integration Complexity: Size Doesn't (Always) Matter

April 1st, 2021 - By Kurt Shuler

Even small IoT designs can have plenty of complexity in architecture and integration.

It’s common when talking about complexity in systems-on-chip (SoCs) to haul out monster examples: application processors, giant AI chips, and the like. Breaking with that tradition, consider an internet of things (IoT) design, which can still challenge engineers with plenty of complexity in architecture and integration. This complexity springs from two drivers: very low power consumption, even using harvested MEMS power instead of a battery, and quick turnaround to build out a huge family of products based on a common SoC platform while keeping tight control on development and unit costs.

Topics: SoC NoC network-on-chip IoT low power semiconductor engineering arteris ip ip-xact interconnects kurt shuler DVFS ip deployment

Semiconductor Engineering: Maximizing Value Post-Moore's Law

Kurt Shuler, Vice President of Marketing at Arteris IP quoted in this new article in Semiconductor Engineering:

Maximizing Value Post-Moore's Law

July 13th, 2020 - By Brian Bailey

The value of a semiconductor can be difficult to measure because it involves costs and benefits over time. As market segments feel different pressures, maximizing value is going in several directions. 

 
“Assessing value is really hard because it is over the lifetime,” says Kurt Shuler, vice president of marketing at Arteris IP. “A lot of chips are disposable. Consider your cell phone. You don’t really care if it’s working 10 years from now. For the data center guys and the AI chips, it’s the same thing. Certain industries do want that chip to last for 15 or 20 years, and that’s automotive, industrial — those kinds of things where there’s a huge capital cost component to that piece of equipment and people are not going to be throwing it away.
 
Topics: SoC IoT ADAS NoC technology semiconductor engineering soc architecture AI kurt shuler data centers noc interconnect IP market chip costs

Semiconductor Engineering: Designing For Extreme Low Power

Kurt Shuler, Vice President of Marketing at Arteris IP comments in this new article in Semiconductor Engineering:

Designing For Extreme Low Power

July 9th, 2020 - By Brian Bailey

Power is becoming a differentiator in many designs, and for IoT and edge devices it may be the most important competitive differentiation. 

 
Most IoT edge devices are basically fairly similar. “The chip basically has sensing, processing and communication,” says Kurt Shuler, vice president of marketing at  Arteris IP . “There is usually one sensor, or multiple sensors attached to it. These things are polling or communicating periodically. They usually have a part of the chip that they call ‘always on’, even though it’s not always on. It’s doing the communications and checking to see if there’s anything from a sensor. Compared to a mobile phone, or some AI chips or an ADAS chip, these chips are not huge. These are really tiny chips, but the power management within them is really complex.”
 
Topics: SoC IoT ADAS NoC technology semiconductor engineering soc architecture kurt shuler noc interconnect IP market

Semiconductor Engineering: Tech Talk - CXL vs. CCIX Video

Tech Talk Video: CXL vs. CCIX 


March 11,  2020 - By Ed Sperling

Ed Sperling interviews Kurt Shuler at Arteris IP headquarters about the differences between CXL and CCIX.

Arteris IP’s Kurt Shuler talks about how these two standards differ, which one works best where, and what each was designed for.

Topics: semiconductor IoT automotive CCIX neural networks AI tech talk video CXL