Arteris Articles

Electronic Design Article: Making ISO 26262 Traceability Practical


This Electronic Design article, 'Making ISO 26262 Traceability Practical', covers Arteris IP's Harmony Trace in this piece authored by Paul Graykowski, Senior Technical Marketing Manager. 

March 4 , 2021 - By Paul Graykowski

The ISO 26262 standard states that functional-safety assessors should consider if requirements management, including bidirectional traceability, is adequately implemented. The standard doesn’t specify how an assessor should go about accomplishing this task. However, it’s reasonable to assume that a limited subset of connections between requirements and implementation probably doesn’t rise to the expectation.

 

For more information about Arteris Harmony Trace please visit: https://www.arteris.com/harmony-trace-design-data-intelligence

 

Topics: NoC functional safety ISO 26262 network-on-chip autonomous vehicles ip-xact SoCs AI chips EDA electronic design traceability Arteris IP (AIP) Arteris Harmony Trace Paul Graykowski HSI PLM ALM

SemiWiki: An Ah-Ha Moment for Testbench Assembly

Bernard Murphy (SemiWiki) gets an update from Arteris IP.

An Ah-Ha Moment for Testbench Assembly 

February 28, 2022 - Bernard Murphy

Sometimes we miss the forest for the trees, and I’m as guilty as anyone else. When we think testbenches, we rightly turn to UVM because that’s the agreed standard, and everyone has been investing their energy in learning UVM. UVM is fine, so why do we need to talk about anything different? That’s the forest and trees thing. We don’t need to change the way we define testbenches – the behavior and (largely) the top-level structure. But maybe there’s a better way to assemble that top level through a more structured assembly method than through hand-coding or ad-hoc scripting. Still built on UVM at leveraging the standardization benefits of IP-XACT for assembly around VIPs.
 
Topics: SoC NoC network-on-chip semiconductor arteris ip semiwiki ip-xact RTL UVM noc interconnect test bench assembly Arteris IP Harmony Trace Paul Graykowski Jama software SoC verification Magillem UTG UVM Testbench Generator Arteris (AIP)

SemiWiki: Business Considerations in Traceability

Bernard Murphy (SemiWiki) gets an update from Arteris IP on why businesses may be increasing pushed to support traceability.

Business Considerations in Traceability 

January 26, 2022 - Bernard Murphy

Traceability as an emerging debate around hardware is gaining a lot of traction. As a reminder, traceability is the need to support a disciplined ability to trace from initial OEM requirements down through the value chain to implementation support and confirmed verification in software and hardware. Demand for traceability appears most commonly in safety-critical applications, from automotive and rail to mil-aero. In process industries such as petroleum, petrochemical and pharmaceutical, to power plants and machinery safety-related controls. And that’s just established applications. The more we push the IoT envelope, Industry 4.0, smart cities and homes, the more cannot-fail products we will inevitably create. Safety, reliability, regulations and even simply managing complex and varied requirements from customers have implications for traceability support.
 
To learn more, click HERE.
Topics: SoC NoC network-on-chip semiconductor automotive arteris ip semiwiki ip-xact compliance noc interconnect design teams Arteris IP Harmony Trace Paul Graykowski Jama software ISO 14971

SemiWiki: Traceability and ISO 26262

Bernard Murphy (SemiWiki) and Kurt Shuler, VP of Marketing at Arteris IP, talk about the growing importance of traceability to ISO 26262 and safety.

Traceability and ISO 26262

November 29, 2021 - Bernard Murphy

Since traceability and its relationship to ISO 26262 may be an unfamiliar topic for many of my readers, I thought it might be useful to spend some time on why this area is important. What is the motivation behind a need for traceability in support of automotive systems development? The classic verification and validation V-diagram is a useful starting point for understanding. The left arm of the V decomposes system design from concepts into requirements, architecture, and detailed design. The right arm represents verification and validation steps from unit testing all the way up to full system validation. Tracing compliance with requirements through this full flow requires new kinds of automation.
 
To learn more, click HERE.
Topics: SoC NoC ISO 26262 network-on-chip semiconductor automotive arteris ip semiwiki ip-xact kurt shuler compliance noc interconnect design teams Arteris IP Harmony Trace ISO 26262 auditors