Arteris Articles

SemiWiki: IP-XACT Resurgence, Design Enterprise Catching Up

Isabelle Geday, VP & GM of the new IP Deployment Division at Arteris IP, gives Bernard Murphy (SemiWiki) insight into some motivations driving companies to switch to IP-XACT.

IP-XACT Resurgence, Design Enterprise Catching Up

June 3, 2021 - Bernard Murphy

This standard has been around in one form or another for over ten years and was then arguably ahead of its time. RTL designers were confused: ‘We already have RTL. Why do we need something else?’ I also didn’t get it. Still, the standard plugged ahead among the faithful and found traction among IP vendors. Particularly as a common format to distribute non-RTL data, like register maps. But a lot has been changing in the meantime. Faster moving competitors. More horizontal and vertical dependencies. Mergers and acquisitions. Chinese technology growth and competition. To adapt, some top-tier organizations have already fully embraced IP-XACT, others are now racing to catch up. Why? Rather than making a dry technical case, I’ll share a few real examples (no names).
Topics: SoC NoC network-on-chip semiconductor arteris ip semiwiki ip-xact RTL noc interconnect AI SoCs Isabelle Geday AI/ML IPD

Semiconductor Engineering: Steep Spike For Chip Complexity And Unknowns

K. Charles Janac, CEO at Arteris IP is quoted in this new Semiconductor Engineering article:

Steep Spike For Chip Complexity And Unknowns

May 5th, 2021 - By Ed Sperling

Increased interactions and customizations drive up risk of re-spins or failures.

“There are several aspects that need to be considered, such as making sure the customer is using the right version of the IP,” said K. Charles Janac, chairman and CEO of Arteris IP. “You’re basically enforcing that the IP-XACT parameters are there in order for the IP block to be admitted into the SoC. There’s also the aspect of supply management. Many of these companies have a layout house, a design house, and foundry contractors. If that entire supply chain is IP-XACT — from the interaction between the various parties in the supply chain to what ultimately provide what goes into the SoC — it gets much, much smoother. At the same time, you are going to have some pieces of the chip that are on the leading-edge process and some on the trailing edge, such as analog.

Topics: SoC NoC network-on-chip semiconductor engineering arteris ip K. Charles Janac ip-xact interconnects chiplets inter-chip IPD

Semiconductor Engineering: SoC Integration Complexity: Size Doesn't (Always) Matter

Kurt Shuler, Vice President of Marketing at Arteris IP authored this new Semiconductor Engineering article:

SoC Integration Complexity: Size Doesn't (Always) Matter

April 1st, 2021 - By Kurt Shuler

Even small IoT designs can have plenty of complexity in architecture and integration.

It’s common when talking about complexity in systems-on-chip (SoCs) to haul out monster examples: application processors, giant AI chips, and the like. Breaking with that tradition, consider an internet of things (IoT) design, which can still challenge engineers with plenty of complexity in architecture and integration. This complexity springs from two drivers: very low power consumption, even using harvested MEMS power instead of a battery, and quick turnaround to build out a huge family of products based on a common SoC platform while keeping tight control on development and unit costs.

Topics: SoC NoC network-on-chip IoT low power semiconductor engineering arteris ip ip-xact interconnects kurt shuler DVFS ip deployment

SemiWiki: SoC Integration - Predictable, Repeatable, Scalable

Bernard Murphy (SemiWiki) gets an update from Kurt Shuler, vice president of Marketing at Arteris IP on the benefits of integrating SoC data and NoC integration. 

SoC Integration - Predictable, Repeatable, Scalable

March 24th, 2021 - Bernard Murphy

On its face System-on-chip (SoC) integration doesn’t seem so hard. You gather and configure all the intellectual properties (IPs) you’re going to need, then stitch them together. Something you could delegate to new college hires, maybe? But it isn’t that simple. What makes SoC integration challenging is that there are so many parts including IPs and connections. Some are moving parts, changing as bugs are fixed. Some, like the interconnect, can only be completely defined when you integrate. There’s a lot of interdependence between these parts. Make a small change like importing a new revision of an IP or adapting to a spec tweak, and the consequences can ripple through your integration, not a big deal, perhaps, early in design. But a very big deal when you’ve finally wrestled hundreds of IPs and tens of thousands of connections into behaving. Then you have to drop in a couple more changes. Surely there’s a better way? Kurt Shuler shares his views on the need.
Topics: SoC NoC network-on-chip semiconductor FlexNoC semiwiki safety XML ip-xact magillem kurt shuler QoS noc interconnect EDA data integration traceability configuration software interface documentation enterprise