Arteris Articles

Semiconductor Engineering: Shifting Toward Data-Driven Chip Architectures

K. Charles Janac, CEO at Arteris IP is quoted in this new article in Semiconductor Engineering:

Shifting Toward Data-Driven Chip Architectures

June 16th, 2021 - By Ed Sperling and Ann Steffora Mutschler

Rethinking how to improve performance and lower power in semiconductors.

“There are dynamic routing opportunities at runtime,” said K. Charles Janac, chairman and CEO of Arteris IP. “We’ve always resisted runtime dynamic routing because there are issues with verification. If you have billions of transactions, the verification is much simpler if you’re forcing the traffic to go onto a single connection every time. But there are opportunities for easing that in the future and have the NoC essentially be able to reroute traffic dynamically based on some sort of routing controller, which in turn is controlled by some global software."

Topics: SoC NoC network-on-chip automotive machine learning semiconductor engineering arteris ip verification K. Charles Janac interconnects datacenters

Semiconductor Engineering: NoCs In Authoritative MPSoC Reference

Kurt Shuler, Vice President of Marketing at Arteris IP authored this new article in Semiconductor Engineering:

NoCs In Authoritative MPSoC Reference

May 6th, 2021 - By Kurt Shuler

The role of the network-on-chip in ensuring total system safety.

K. Charles Janac, president and CEO of Arteris IP, authored the first chapter in that third section on network-on-chip (NoC) architecture and how it has enabled MPSoCs. 

The chapter starts with the evolution from buses to crossbars to NoCs. Next is a useful overview of a typical approach to architecting and configuring a NoC. As the most configurable intellectual property (IP) in an SoC, getting the design to an optimal solution requires careful planning and refinement. The design evolves, not just the logic but also the topology.

By the way, this book is a technical review, not a marketing pitch. Charlie is quite open that while NoCs share some concepts with “regular” communications networks, the analogy cannot be stretched too far. NoC design is still very much an activity for semiconductor designers, not general network designers.

Topics: SoC NoC functional safety network-on-chip ECC cache coherency IEEE semiconductor engineering arteris ip ASIL D K. Charles Janac interconnects kurt shuler ai accelerators security TMR MPSOC LBIST

Semiconductor Engineering: Steep Spike For Chip Complexity And Unknowns

K. Charles Janac, CEO at Arteris IP is quoted in this new Semiconductor Engineering article:

Steep Spike For Chip Complexity And Unknowns

May 5th, 2021 - By Ed Sperling

Increased interactions and customizations drive up risk of re-spins or failures.

“There are several aspects that need to be considered, such as making sure the customer is using the right version of the IP,” said K. Charles Janac, chairman and CEO of Arteris IP. “You’re basically enforcing that the IP-XACT parameters are there in order for the IP block to be admitted into the SoC. There’s also the aspect of supply management. Many of these companies have a layout house, a design house, and foundry contractors. If that entire supply chain is IP-XACT — from the interaction between the various parties in the supply chain to what ultimately provide what goes into the SoC — it gets much, much smoother. At the same time, you are going to have some pieces of the chip that are on the leading-edge process and some on the trailing edge, such as analog.

Topics: SoC NoC network-on-chip semiconductor engineering arteris ip K. Charles Janac ip-xact interconnects chiplets inter-chip IPD

Semiconductor Engineering: Security Concerns Rise For Connected Autos

K. Charles Janac, CEO at Arteris IP is quoted in this new Semiconductor Engineering article:

Security Concerns Rise For Connected Autos

April 29th, 2021 - By John Koon

Value of automotive data increases, widening the attack surface.

“We’re seeing a shift in the entire automotive industry, essentially from mechanics to electronics being the core competence of the automotive industry,” said K. Charles Janac, chairman and CEO of Arteris IP. “This includes either influence on architectures or IP design, or maybe even doing entire SoCs, by the car companies and by the Tier 1s, because you need to control your architecture in order to enforce upgradability.”

Topics: SoC NoC network-on-chip ADAS autonomous vehicles semiconductor engineering arteris ip K. Charles Janac interconnects 5G automotive security ISO 21434