Arteris Articles

Semiconductor Engineering: Key Drivers in New Chip Industry Outlook

K. Charles Janac, chairman and CEO at Arteris IP is quoted in this new Semiconductor Engineering article:

Key Drivers in New Chip Industry Outlook

May 4th, 2020 - By Ed Sperling

CEOs and analysts examine winners and losers and where demand is shifting.
 
“Opinions are all over the place,” said K. Charles Janac, chairman and CEO of Arteris IP . “If you look at high tech, about 60% of the segments are down, 40% are up. What’s up is infrastructure, which includes data centers, networking, cameras, security, entertainment and video games. What’s down are the end points — smart phones, cars, some consumer, industrial and automotive. The big question is whether this is due to the pandemic and overreaction, or whether this is going to be a debt-driving mainstream crisis.”
 
Topics: SoC automotive NoC technology semiconductor engineering K. Charles Janac data centers noc interconnect IP market covid-19 smart phones

Semiconductor Engineering: CEO Outlook: 2020 Vision

 Arteris IP's CEO, Charlie Janac, is quoted in a 2020 survey of CEOs from across the country in this Semiconductor Engineering article:

CEO Outlook: 2020 Vision

January 6th, 2020 - By Ed Sperling

5G, China and AI are prominent, but big changes are coming everywhere.

 

“In 2020, highway driving starts to become real for autonomous vehicles,” said K. Charles Janac, CEO of ArterisIP. “You’re also going to see more applications for machine learning and AI emerge. Right now, there is too much money being spent on this by big Internet companies that are doing a lot internally. Those investments will shift. You’ll also see 5G becoming very important. We will need that for the last mile. The other killer app is cyber security, and this is one that is somewhat worrisome because we’re starting to see 5G and machine learning being used to track entire populations.”

To learn more, please download this Technical Paper on "Re-Architecting SoCs for the AI Era", please go here; https://www.arteris.com/download-re-architecting-socs-for-the-ai-era

Topics: SoC Networks-On-Chip autonomous vehicles semiconductor engineering arteris ip K. Charles Janac charlie janac noc interconnect ML/AI 5G cyber security

EE Times article, The Age of the Monster Chip

K. Charles Janac, President and CEO, at Arteris IP, authored this article on what is now defined as a "Monster Chip".

September 19, 2019 - by K. Charles Janac

What are the system designs that require a leap in SoC complexity? It’s not only big datacenter artificial intelligence (AI) chips, but also autonomous vehicles such as cars, trucks and drones; they are self-landing, reusable rockets; they are medical devices carrying out remote diagnostics; and they are connected machine tool controllers supporting smart manufacturing.

These chips are starting to be referred to as “Monster Chips” because of both the size and complexity.

Topics: semiconductor ADAS eetimes autonomous driving AI K. Charles Janac SoCs noc interconnect data center automation blockchain big chips

EE Times article, The Gatekeeper of a Successful Design is the Interconnect

K. Charles Janac, President and CEO, at Arteris IP, authored this article on how an effective interconnect makes delivering a complex SoC easier, more predictable, and less costly.

August 25, 2019 - by K. Charles Janac

An interconnect handles various types of traffic inside an SoC and is a mechanism for effective IP block integration. The interconnect is the most configurable IP in the SoC — typically changing many times during a project and nearly always changing between projects. It also plays a vital role in security and functional safety because it carries most of the SoC data and contains nearly all the SoC’s long wires and system-level services, including quality of service (QoS), visibility, physical awareness, and power management. The interconnect enables cache coherency in multiprocessor SoCs, high-performance and bandwidth levels in advanced driver assistance systems (ADAS) automotive chips and networking SoCs, and ultra-low power in long-running consumer devices.

Topics: semiconductor eetimes advanced driver assistance systems adas autonomous driving AI K. Charles Janac SoCs noc interconnect ML data center automation