Arteris Articles

Semiconductor Engineering: Interconnects In A Domain-Specific World

Kurt Shuler, Vice President of Marketing and Guillaume Boillet, Director of Product Management at Arteris IP are quoted in this new Semiconductor Engineering article:

Interconnects In A Domain-Specific World

April 8th, 2021 - By Brian Bailey

When and where tradeoffs between efficiency and flexibility make sense.

"The prediction of power consumption of chips under a given workload is one of the most complex tasks our industry must tackle today,” says Guillaume Boillet, director of product management for Arteris IP

Kurt Shuler, vice president of marketing at Arteris IP says, “You may have 200 things connected to your NoC at the center of the chip. The NoC tool manages all of the meta data for the IP connected to it. Back-figuring all that information is a huge source of systematic errors. We all make mistakes. And that causes problems, not just for regular chips. But can you imagine that for typical functional safety requirements?”

Topics: SoC NoC functional safety network-on-chip neural networks semiconductor engineering arteris ip interconnects kurt shuler power consumption meta data

Semiconductor Engineering: SoC Integration Complexity: Size Doesn't (Always) Matter

Kurt Shuler, Vice President of Marketing at Arteris IP authored this new Semiconductor Engineering article:

SoC Integration Complexity: Size Doesn't (Always) Matter

April 1st, 2021 - By Kurt Shuler

Even small IoT designs can have plenty of complexity in architecture and integration.

It’s common when talking about complexity in systems-on-chip (SoCs) to haul out monster examples: application processors, giant AI chips, and the like. Breaking with that tradition, consider an internet of things (IoT) design, which can still challenge engineers with plenty of complexity in architecture and integration. This complexity springs from two drivers: very low power consumption, even using harvested MEMS power instead of a battery, and quick turnaround to build out a huge family of products based on a common SoC platform while keeping tight control on development and unit costs.

Topics: SoC NoC network-on-chip IoT low power semiconductor engineering arteris ip ip-xact interconnects kurt shuler DVFS ip deployment

Semiconductor Engineering: Computing Where Data Resides

Kurt Shuler, Vice President of Marketing at Arteris IP is quoted in this new Semiconductor Engineering article:

Computing Where Data Resides

March 29th, 2021 - By Ann Steffora Mutschler

Computational storage approaches push power and latency tradeoffs.

“Ten years ago solid state drives were new,” said Kurt Shuler, vice president of marketing at Arteris IP. “There really wasn’t anything like an enterprise SSD. There were little microcontrollers running on platter-type hard drives. That was where semiconductors were then. Since that time, so much has changed. A lot of startups were doing really sophisticated SSD controllers, and the problem initially was that NAND flash consumes itself while it’s operating, so you always have to check the cells. Then, once you find out they’re bad, you must rope them off and tell them not to save anything there anymore. If you buy a 1-terabyte SSD drive, it actually has more than 1 terabyte because it’s grinding itself to death as it operates. For the SSD controllers, that was the initial challenge. But now, storage disk companies have undergone a lot of consolidation. If you look at what’s going on computational storage, we have customers who are doing SSD storage and controllers for the data center that are focused on a particular application, such as video surveillance, so there is computation actually within those controllers that is dealing with that particular use case. That is completely new. Within that computation, you’ll see things like traditional algorithmic, if/then analysis. Then, some of it is trained AI engines. Any of the SSD, enterprise SSD controllers are heading in that direction.”

Topics: SoC NoC network-on-chip enterprise SSD semiconductor engineering arteris ip cache interconnects kurt shuler computational storage AI engines

SemiWiki: SoC Integration - Predictable, Repeatable, Scalable

Bernard Murphy (SemiWiki) gets an update from Kurt Shuler, vice president of Marketing at Arteris IP on the benefits of integrating SoC data and NoC integration. 

SoC Integration - Predictable, Repeatable, Scalable

March 24th, 2021 - Bernard Murphy

On its face System-on-chip (SoC) integration doesn’t seem so hard. You gather and configure all the intellectual properties (IPs) you’re going to need, then stitch them together. Something you could delegate to new college hires, maybe? But it isn’t that simple. What makes SoC integration challenging is that there are so many parts including IPs and connections. Some are moving parts, changing as bugs are fixed. Some, like the interconnect, can only be completely defined when you integrate. There’s a lot of interdependence between these parts. Make a small change like importing a new revision of an IP or adapting to a spec tweak, and the consequences can ripple through your integration, not a big deal, perhaps, early in design. But a very big deal when you’ve finally wrestled hundreds of IPs and tens of thousands of connections into behaving. Then you have to drop in a couple more changes. Surely there’s a better way? Kurt Shuler shares his views on the need.
Topics: SoC NoC network-on-chip semiconductor FlexNoC semiwiki safety XML ip-xact magillem kurt shuler QoS noc interconnect EDA data integration traceability configuration software interface documentation enterprise