Arteris Articles

Semiconductor Engineering: Amdahl Limits On AI

Michael Frank, Fellow and System Architect at Arteris IP is quoted in this new with Semiconductor Engineering article:

Amdahl Limits On AI

December 9th, 2021 - By Brian Bailey

The application of old techniques to new problems only gets you so far. To remove limitations in AI processors, new thinking is required.

“If you can’t parallelize a section, the serial section determines the maximum speed up,” says Michael Frank, fellow and system architect at Arteris IP. “If you assume that you can parallelize infinitely at times, the parallel section becomes limited by the bandwidth that you have available in the system. So there is a maximum that I can parallelize, because I run out of bandwidth.”

Topics: network-on-chip machine learning artificial intelligence semiconductor engineering arteris ip SoCs NoCs Arteris IP (AIP) RISC-V on-chip cache memory bandwidth