Kurt Shuler, Vice President of Marketing at Arteris IP comments in this new article in Semiconductor Engineering:
Winners and Losers At The Edge
July 7th, 2020 - By Ed Sperling
No company owns this market yet — and won’t for a very long time.
by Madelyn Miller, on Tue, Jul 07, 2020 @ 07:15 AM
Kurt Shuler, Vice President of Marketing at Arteris IP comments in this new article in Semiconductor Engineering:
July 7th, 2020 - By Ed Sperling
No company owns this market yet — and won’t for a very long time.
by Madelyn Miller, on Wed, May 13, 2020 @ 10:30 AM
Kurt Shuler, vice president of marketing at Arteris IP authored this new All About Circuits article:
May 13th, 2020 - By Kurt Shuler
There is a challenge for SoC developers to find ways to navigate the demand of memory in their design. This article looks at how a fourth, or last-level, cache can provide a solution.
by Madelyn Miller, on Tue, Dec 17, 2019 @ 01:59 PM
Last month, Canaan Inc. successfully went public with an IPO on Nasdaq. And just last week, our Arteris IP team was invited to attend a grand dinner to celebrate this wonderful achievement. During the dinner, Arteris IP was awarded by Canaan the "Best Ecosystem Partner of 2019 Award" which Rick Sun, our China Sales Manager (second from the right in the above photo) is holding.
The entire Arteris IP team is proud that our efforts have helped contribute to Canaan's success on their AI chip, and we we look forward to more activities with them as they continue their explosive growth. This award is a testament not only to our products and technologies, but also the excellent Arteris IP team members supporting our customers worldwide.
by Madelyn Miller, on Fri, Aug 30, 2019 @ 11:34 AM
Kurt Shuler, VP of Marketing at Arteris IP has written this 10-page technical paper titled, "Re-Architecting SoCs for the AI Era".
August 29, 2019 - by Kurt Shuler
Abstract:
The growth of artificial intelligence (AI) demands that semiconductor companies re-architect their system on chip (SoC) designs to provide more scalable levels of performance, flexibility, efficiency, and integration. From the edge to data centers, AI applications require a rethink of memory structures, the numbers and types of heterogeneous processors and hardware accelerators, and careful consideration of how the dataflow is enabled and managed between the various high-performance IP blocks.
News and original writing about on-chip interconnects, on-chip communications and the semiconductor intellectual property ("semi IP") industry.
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