Arteris Articles

Semiconductor Engineering: The Role Of NoCs In System-Level Services

Kurt Shuler, Vice President of Marketing at Arteris IP authored this new article in Semiconductor Engineering:

The Role Of NoCs In System-Level Services

September 8th, 2020 - By Kurt Shuler

The central nervous system of SoCs is expanding to help manage things like QoS and performance.

The primary objective of any network-on-chip (NoC) interconnect is to move data around a chip as efficiently as possible with as little impact as possible on design closure while meeting or exceeding key design metrics (PPA, etc.). These networks have become the central nervous system of SoCs and are starting to play a larger role in system-level services like quality of service (QoS), debug, performance analysis, safety and security because these on-chip interconnects transport and “see” most if not all of the of the on-chip dataflow. Think of the NoC as the SoC’s “all seeing eye” and you’ll have a better understanding of what is technically possible.
 
Topics: SoC NoC ISO 26262 SoC QoS automotive semiconductor engineering soc architecture ASIL D kurt shuler QoS noc interconnect IP market

Semiconductor Engineering: Not Enough Respect for SoC Interconnect

K. Charles Janac, CEO at Arteris IP, shares his opinion in this week's blog appearing in Semiconductor Engineering:

Not Enough Respect for SoC Interconnect

 

July 30th, 2018 - By K. Charles Janac

Topics: SoC functional safety SoC security semiconductor advanced driver assistance systems adas flexnoc interconnect semiconductor engineering soc architecture AI arteris ip ips K. Charles Janac on-chip memory interconnects logic IP modules SoC assembly topologies 5G mobility QoS