Arteris Articles

The Critical Cost of Routing Congestion

By Jonah Probell, Senior Solutions Architect, Arteris

Topics: SoC SoC economics SoC design routing congestion timing closure

The 3 Evils of Routing Congestion

Much of the talk today in the system on chip (SoC) ASIC business is about how smaller critical dimensions are driving the use of more and more IP blocks on a single SoC. As the number of IP blocks increases, the act of assembling and physically manufacturing the SoC become Herculean. What’s the big deal?

Topics: routing congestion timing closure