Arteris Articles

EDA Cafe: Why Automate Traceability?

Vincent Thibaut, Director of IP Deployment Product Strategy at Arteris IP authored this new article for EDA Cafe:

Why Automate Traceability?

October 13th, 2021 - By Vincent Thibaut


Over the years, Arteris IP has worked with several aerospace, transportation and automotive partners on design systems for avionics, space image processing and processing for scientific payloads. More recently, complex advanced driver-assistance systems (ADAS) projects at various levels of autonomy have been added to the list. One thing common between all these projects has been the tight coupling between system-level specification and all aspects of software and hardware from multiple suppliers and integrators, along with the very tight demands on safety and reliability.

Topics: SoC NoC ISO 26262 automotive SystemC arteris ip verification ip-xact aerospace EDA ip deployment IPD vincent thibaut defense IEEE 1685 IP-XACT

SemiWiki: More Tales from the NoC Trenches

Bernard Murphy (SemiWiki), gets an update from Kurt Shuler, VP of Marketing and William Tseng, AE Manager at Arteris IP, about a few more misconceptions in early NoC evaluation. 

More Tales from the NoC Trenches

September 23, 2021 - Bernard Murphy

Science texts like to present the evolution of knowledge as step-function transitions, from ignorance to wisdom. We used to think the sun revolved around the earth. Then Galileo appeared, and we instantly realized that the earth revolves around the sun. But reality is always messier, as Galileo understood all too well. The transition from darkness to light is often bumpy. The same can be said for adopting new technologies. There may be mechanical challenges along the way, but the biggest barriers are often our own preconceptions. I talked to William Tseng (AE Manager) and Kurt Shuler (VP Marketing) at Arteris IP to share more tales from the trenches on this learning curve in NoC adoption. 
Topics: SoC NoC ISO 26262 network-on-chip semiconductor automotive mesh AI arteris ip semiwiki kurt shuler noc interconnect william tseng

EDN: How NoCs Ace Power Management and Functional Safety in SoCs

Benoit de Lescure, CTO at Arteris IP authors this 3rd article in a new series for EDN:

How NoCs Ace Power Management and Functional Safety in SoCs

September 15th, 2021 - By Benoit de Lescure

The NoC interconnect is the SoC architecture.

This third article highlights how NoC technology provides capabilities like power management and functional safety that are not possible with older crossbar-based interconnect technologies. For design teams creating modern SoCs, whether large datacenter AI accelerators or power-sipping IoT sensors, NoC interconnect technology is key to implementing these SoC architectures and optimizing the dataflow within them.

To catch up on the first and second articles in this series, click below:

Topics: ARM NIC-400 SoC NoC functional safety network-on-chip crossbar automotive AI arteris ip Benoit de Lescure interconnects EDN LBIST Design Management Power Management Semiconductors DVSF

EDA Cafe: What Does MBSE Have to Do with SoCs?

Vincent Thibaut, Director of IP Deployment Product Strategy at Arteris IP authored this new article for EDA Cafe:

What Does MBSE Have to Do with SoCs?

August 17th, 2021 - By Vincent Thibaut


In technology, the only constant is change, sometimes at a dizzying pace. One emerging trend is how product specifications, additions and changes are passed onto system-on-chip (SoC) design teams. Traditionally, this transfer is done by exchanging documents, models (perhaps Simulink) and some form of written use-case descriptions. However, this process is very cumbersome, subjective and error-prone. It is also a very poor method for documenting and tracking revisions required by agile design teams employing best practices. It may not be a problem when building catalog products, but the world has changed.

Topics: SoC NoC automotive ArterisIP arteris ip verification ip-xact Tier 1s Bosch ip deployment IPD SysML vincent thibaut model-based system engineering ISO standard UML Simulink microchip designer Matlab NASA