Arteris Articles

Semiconductor Engineering: Where Do Memory Maps Come From?

Guillaume Boillet, Senior Director of Product Management at Arteris IP authored this Semiconductor Engineering article:

Where Do Memory Maps Come From?

March 3rd, 2022 - By Guillaume Boillet

Ensuring software can accurately address hardware.

A memory map is the bridge between a system-on-chip (SoC) and the firmware and software that is executed on it. Engineers may assume the map automatically appears, but the reality is much more involved. The union of hardware (HW) and software (SW) demands both planning and compromise. The outcome of this merger will not be fully realized until the magical day when the system comes to life.

To learn more about SoC and Hardware/Software Interface (HSI) Development, please download this datasheet:  SoC & Hardware / Software Interface (HSI) Development Datasheet 


Topics: software network-on-chip power time to market semiconductor engineering arteris ip hardware SoCs EDA Guillaume Boillet NoCs Arteris IP (AIP) HSI addresses embedded firmware memory map

Semiconductor Engineering: Bridging The Gap Between Smart Cities And Autonomous Vehicles

Kurt Shuler, VP of Marketing at Arteris IP is quoted in this Semiconductor Engineering blog:

Bridging The Gap Between Smart Cities And Autonomous Vehicles

February 4th, 2021 - By Ann Steffora Mutschler

Communication, security, and power issues still need to be solved, but there is progress.

“It’s important to remember that a lot of power consumption is from the electric motor, so being able to optimize traffic and traffic flows will make a difference,” said Kurt Shuler, vice president of marketing at Arteris IP. “In terms of vehicle infrastructure, having the big Waze brain be able to actually direct your car and optimize all of that would reduce power. It’s like fleet management for FedEx, but for everybody.”

Topics: SoC NoC software network-on-chip automotive autonomous vehicles semiconductor engineering arteris ip kurt shuler v2x 5G smart cities

Semiconductor Engineering: A Renaissance For Semiconductors

Kurt Shuler, Vice President of Marketing at Arteris IP is quoted in this new article in Semiconductor Engineering:

A Renaissance For Semiconductors

October 28th, 2020 - By Brian Bailey

New horizontal technologies and vertical markets are fueling the opportunities for massive innovation throughout an expanding ecosystem.

Even within artificial intelligence there are multiple facets to the problem. “From an SoC architecture standpoint, think of a 2 x 2 matrix where you have data center versus edge on one side,” says Kurt Shuler, vice president of marketing at Arteris IP. “People may argue about where the dividing line is, but you could think of it as stuff that runs off a battery versus stuff that has to be plugged in. The other side is artificial intelligence, and there are two aspects to that. One is training the neural network, and the other is using that neural network in the real world — inference. So you have this 2 x 2 matrix of data center versus edge, and training versus inference.

Topics: SoC NoC software automotive semiconductor engineering soc architecture interconnects kurt shuler noc interconnect chiplets 5G IP market chips

Semiconductor Engineering: Big Shift In Multi-Core Design

 Arteris IP's Kurt Shuler, Vice President of Marketing, adds commentary in this article in Semiconductor Engineering.

Big Shift In Multi-Core Design

April 3rd, 2019 - By Ann Steffora Mutschler

System-wide concerns in AI and automotive are forcing hardware and software teams to work together, but gaps still remain.

Minding the gap
There are indications that mindset is beginning to change, particularly in markets such as automotive where systemic complexity extends well beyond a single chip or even a single vehicle.

“In the past, if you were a software engineer, the thinking was, ‘I have this chip available. Here’s what I can produce with my software,'” said Kurt Shuler, vice president of marketing at Arteris IP. “Nowadays, especially in the ADAS side of things that have an AI component or some kind of programmable object detection for the ADAS functionality, or an AI chip—whether it’s for the data center, edge, inference or training—the thinking has shifted more to system-design decisions. If this is designed with this given set of software algorithms, it is clear what needs to happen at a system level from the hardware and software point of view. At what level of detail should I optimize this hardware for the particular software I expect to run? This means the hardware and the software are now much more tightly integrated in those use cases than they probably have ever been unless it’s a very detailed embedded application. So now, in the early stages of design for these types of chips, whether it’s the autonomous driving chips or the AI chips, the software architect is in there, too.”

This is a definite sign of progress. “Before, they didn’t care,” Shuler said. “The layer/API between hardware and software is becoming less generic and more specific for those kinds of use cases, solving those kinds of problems. What that means, though, is there are software guys who went to Stanford and trained on Java script and have no idea what a register is. Then there are hardware guys who have no idea what a hypervisor or object-oriented programming is.”

For more information on AI, please click on the Arteris FlexNoC AI Package webpage:

Topics: SoC software automotive ADAS autonomous driving semiconductor engineering AI hardware noc interconnect