Arteris Articles

Semiconductor Engineering: Time For FMEDA Reuse?

Stefano Lorenzini, Fellow & Functional Safety Manager at Arteris IP authored this Semiconductor Engineering article:

Time for FMEDA Reuse?

 July 7th, 2022 - By Stefano Lorenzini

Making it easier to integrate configurable IP into safety-critical systems.

How do designers quantify safety in electronic systems? Through one or more tables called Failure Modes, Effects and Diagnostic Analysis – FMEDA. In fact, an FMEDA does not have to be a table; it could be manifested in scripts or some other form, but a table is the easiest way to think of this information. Think of an FMEDA for an IP, as the concept extends easily to a system-on-chip (SoC). The table has a row for each failure mode that the IP experts can imagine might lead to a critical safety problem. Following identifying information for that failure mode is a description of the effect – the safety problem it might cause. Through fault simulation, the safety engineer determines the likelihood of the root cause problem leading to that effect. If the likelihood is significant, the designer will propose a mitigation technique, such as a parity check to detect the problem or an error-correcting code (ECC) check to correct it. A completed FMEDA then represents a comprehensive safety quality document for that IP, a characterization that an SoC integrator can use when determining the FMEDA for the whole design.

Learn more about Arteris IP Deployment Technology Products .

 

Topics: IP System-on-Chip functional safety network-on-chip semiconductor engineering SoCs FMEDA scalability traceability Stefano Lorenzini NoCs Arteris IP (AIP)

EE Times article, The Internet of Cars Is Paved With Silicon

Charles Janac, President & Chief Executive Officer at Arteris IP, authored this new EE Times article.

November 07th, 2021

Charles Janac, chief operating officer at Arteris, explains that "the now-mandatory connectivity to the internet and cloud datacenters shifts automakers’ core competencies from mechanical design to software and silicon. The Internet of Cars will not run on gasoline or even electricity but on data. That data is gathered, processed, communicated and stored by system-on-chip (SoC) semiconductors."

Topics: System-on-Chip NoC network-on-chip IoT automotive ADAS eetimes SoCs silicon data Arteris (AIP)

Mesh Networking Grows For ICs

Ty Garibay, CTO at Arteris IP, adds his comments in this Semiconductor Engineering article:

Mesh Networking Grows For ICs

 

April 4th,  2018 - By Kevin Fogarty

Topics: SoC System-on-Chip on-chip interconnect Ty Garibay semiconductor engineering mesh networks 2.5D AI

Semiconductor Engineering: Getting Serious About Chiplets

Ty Garibay, CTO of Arteris IP stated, “Not only is it hard to justify the cost of these advanced nodes, it’s also hard to find people that can do it", in this Semiconductor Engineering article:

Getting Serious About Chiplets

 

January 8th,  2018 - By Ann Steffora Mutchler

Topics: System-on-Chip Ty Garibay semiconductor engineering chiplet