Arteris Articles

Semiconductor Engineering: Taming Non-Predictable Systems

Michael Frank, Fellow and System Architect at Arteris IP is quoted in this Semiconductor Engineering blog:

Taming Non-Predictable Systems

January 28th, 2021 - By Brian Bailey

The non-predictable nature of most systems is not inherently bad, so long as it is understood and bounded — but that’s becoming a bigger challenge.

“Real-time is a ‘stretchable’ term,” says Michael Frank, fellow and system architect at Arteris IP. “In general, it implies that a certain action is completed within a bounded time, with 100 % probability, as opposed to engineering schedules. For most real-time systems, the definition is not that strict. Some systems are fine if the average is within a certain window that meets the requirement, such as for video decoding. Other cases may look to see if the deadline will only be missed with a certain low random probability. Those systems may replace a missing result by a prediction/interpolation, such as dropped audio samples.”

Topics: SoC NoC network-on-chip semiconductor engineering AI verification real-time systems Michael Frank

Semiconductor Engineering: Productivity Keeping Pace With Complexity

Benoit de Lescure, CTO at Arteris IP is quoted in this new article in Semiconductor Engineering:

Productivity Keeping Pace With Complexity

September 25th, 2020 - By Brian Bailey

Without productivity gains, design size and complexity would face huge headwinds. Those gains come from a diverse set of improvements.

Nobody doubts the power of reuse. Intellectual Property blocks are either built into a library for those inside of large companies, or if you’re a small company, you go outside and you buy it,” says Benoit de Lescure, CTO for Arteris IP. “Complexity is managed through a divide and conquer strategy. Companies are also using larger macro functions that you stitch together with the same amount of people. Today, you can buy a multiple CPU block, with Level 3 cache, and complex cache coherent interconnect. These have been designed to be easy to configure, and so you can create a very large CPU complex with 8 or 16 CPUs, and that becomes the macro functions you’re integrating.”

Topics: SoC NoC automotive cache coherent interconnect semiconductor engineering soc architecture CPUs Benoit de Lescure verification noc interconnect ML/AI IP market

Semiconductor Engineering: Does Power Verification Work?

Benoit de Lescure, Sr. Director of Technology at Arteris IP, states in this Semiconductor Engineering article:

Does Power Verification Work?

 

May 10th, 2018 - By Brian Bailey

Topics: FlexNoC semiconductor engineering arteris ip voltage Benoit de Lescure verification