Latest News

Semiconductor Engineering: Tracking Automotive's Rapidly Shifting Ecosystem

Kurt Shuler, vice president of marketing at Arteris IP is quoted in this Semiconductor Engineering article:

Tracking Automotive's Rapidly Shifting Ecosystem

April 2nd, 2020 - By Ann Steffora Mutschler

 Arteris IP, which has been active in the automotive market since 2010 and has established relationships with most of the automotive semiconductor players, this behavior is not a surprise.
 
“There’s paperwork that goes back and forth about who has been certified for what, or how to go about assessments or about ISO 26262,” said Kurt Shuler, vice president of marketing at Arteris IP. “For companies new to this, whether on the semiconductor side making an automotive chip or an IP that’s going into automotive, it can be weird to get questions from customers asking for the processes to be described, or how traceability of requirements is done through to the specifications, and the implementation queue. If you’re not in automotive or medical devices or something similar, like military/aerospace, you’re not used to being asked those questions or even revealing that information externally. If you’re new to an automotive chip, or new to automotive IP, you have to deal with that. It’s an education process.”
 
Topics: SoC ISO 26262 automotive ADAS autonomous vehicles NoC technology semiconductor engineering OEMs noc interconnect Tier 1s IP market

Semiconductor Engineering: AI, Performance, Power, Safety Shine Spotlight on Last-Level Cache

Kurt Shuler, vice president of marketing at Arteris IP writes about overcoming memory limitations in automotive systems in this Semiconductor Engineering article:

AI, Performance, Power, Safety Shine Spotlight on Last-Level Cache

April 2nd, 2020 - By Kurt Shuler

Memory limitations to performance, always important in modern systems, have become an especially significant concern in automotive safety-critical applications making use of AI methods. On one hand, detecting and reporting a potential collision or other safety problem has to be very fast. Any corrective action is constrained by physics and has to be taken well in advance to avoid the problem.
 
Topics: SoC automotive NoC technology semiconductor engineering CodaCache performance last level cache noc interconnect IP market

Arteris IP is Now Hiring a Corporate Application Engineer in Campbell, CA

This is a New Position!

Corporate Application Engineer in Campbell, CA

Now is the time to join Arteris IP!

Do you want to contribute to the backbone of some of the world’s most popular SoCs?

As a Corporate Application Engineer at Arteris, you will work with an expert team to support and deploy interconnect and memory hierarchy solutions for some of the world’s most sophisticated mobile, telecom, automotive, AI and consumer SoC designs.

Topics: software jobs functional safety ISO 26262 arteris ip noc interconnect job SoC designs leader IP design

Arteris® IP FlexNoC® Interconnect Again Licensed by NETINT Technologies for Codensity Enterprise SSD Controllers

State-of-the-art Network-on-Chip (NoC) technology enables next-generation of SSD controllers for high density real-time 4K H.265 video transcoding and storage

CAMPBELL, Calif. – March 24, 2020 – Arteris IP, the world’s leading supplier of innovative, silicon-proven network-on-chip (NoC) interconnect intellectual property, today announced that NETINT Technologies has once again licensed Arteris IP FlexNoC Interconnect for use in its next-generation of enterprise solid state disk (SSD) storage system controllers with on-chip video encoding processors. NETINT’s first purchase of Arteris IP interconnect licenses was announced in January of 2019 (see, “Arteris IP FlexNoC® Interconnect Licensed by NETINT Technologies for PCIe 4.0 Enterprise SSD Controllers”).

Our Codensity G4 D400 SSDs were the industry’s first SSDs supporting a PCIe 4.0 interface, and our next-generation SSD controllers will push technology boundaries even more. Arteris FlexNoC interconnect IP has been critical to our products’ success because it enables the high bandwidth, low latency and data protection required for our systems. The flexibility of Arteris FlexNoC has allowed us to implement more sophisticated SoC architectures in less time that would otherwise be possible, thereby allowing us to create higher margin chips with less engineering effort.”


Tao Zhong, CEO, NETINT

Topics: SoC NoC new customer enterprise SSD low power performance high-bandwidth on-chip video encoding Arteris IP FlexNoC interconnect

Semiconductor Engineering: A Promising Future For Interconnect IP

Rich Wawrzyniak of Semico Research describes the market drivers for advanced multicore SoC architectures and the critical role of NoC interconnect semiconductor intellectual property (IP) in this Semiconductor Engineering article:

A Promising Future For Interconnect IP

March 18th, 2020 - By Rich Wawrzyniak

Complexity of SoC designs continues to 

increase primarily due to increased demand for functionality and performance in all electronic devices. Studies that Semico Research has conducted on the SoC design landscape shows the number of discrete SIP blocks has continued to rise in response to increased market requirements from new applications and richer feature sets.

Topics: SoC NoC technology semiconductor engineering AI chips noc interconnect IP market

Semiconductor Engineering: Tech Talk - Changes In AI SoCs

Tech Talk Video: Changes In AI SoCs 


March 16,  2020 - By Ed Sperling

Ed Sperling of Semiconductor Engineering interviews Kurt Shuler at Arteris IP headquarters in this new video.

Arteris IP’s Kurt Shuler talks about the tradeoffs in AI SoCs, which range from power and performance to flexibility, depending on whether processing elements are highly specific or more general, and the need for more modeling.

Topics: semiconductor AI tech talk video SoCs kurt shuler

Arteris® IP FlexNoC® Interconnect & Resilience Package Licensed by SiEngine for ISO 26262-Compliant Automotive Systems

State-of-the-art Network-on-Chip (NoC) interconnect increases chip performance, reduces design schedules, and provides functional safety mechanisms

CAMPBELL, Calif. – February 4, 2020 – Arteris IP, the world’s leading supplier of innovative, silicon-proven network-on-chip (NoC) interconnect intellectual property, today announced that SiEngine has licensed the Arteris IP FlexNoC interconnect and the accompanying FlexNoC Resilience Package for use as the on-chip dataflow backbone of its next-generation automotive systems-on-chip (SoC).

We chose Arteris FlexNoC IP and the Resilience Package because of its integrated functional safety mechanisms and its ability to reduce on-chip routing congestion and increase performance. We are pleasantly surprised by the product’s rich functionality, flexible configuration and the excellent support from Arteris IP’s engineers, which allow us to achieve the specifically required functions with competitive performance.”


Xin-xin Yang, R&D Vice President, SiEngine

Topics: SoC NoC new customer automotive ISO 26262 resilience package performance AI chips ML/AI

Arteris IP Adds 17 New Licensees, Revenue Exceeds $31M in 2019

Network-on-Chip (NoC) semiconductor IP growth driven by customer development of new automotive, machine learning & data center systems-on-chip (SoCs)

CAMPBELL, Calif. — January 28, 2020 — Arteris IP, the world’s leading supplier of innovative, silicon-proven network-on-chip (NoC) interconnect intellectual property, today announced that the company added 17 new licensees in 2019 for its Arteris® IP Ncore®, FlexNoC®, CodaCache®, AI Package, Resilience Package, and PIANO® Interconnect IP products. Of the 15 Arteris IP licensees publicly announced during 2019, three were acquired during the year (Bitmain, DisplayLink, and Vayyar) and fourteen are as yet undisclosed. The total number of Arteris IP customers reached 130.

“With our sizeable customer acquisition of 17 new licensees in 2019 and 20 new licensees in 2018, Arteris IP has increased interconnect market share against all alternatives. This growth allows Arteris IP to commercially invest more than anyone else in interconnect IP engineering and support to deliver best-in-class NoC technology to our customers. Arteris IP is increasingly the world’s trusted NoC interconnect engineering think tank able to augment an SoC ecosystem of related IP and EDA companies.”


K. Charles Janac, President and CEOArteris IP

Topics: new customer Ncore FlexNoC ncore cache coherent interconnect flexnoc ai package

Arteris® IP FlexNoC® Interconnect and AI Package Licensed by Vastai Technologies for Artificial Intelligence Chips

State-of-the-art Network-on-Chip (NoC) interconnect enables faster performance and shorter development time

CAMPBELL, Calif. — January 21, 2020 — Arteris IP, the world’s leading supplier of innovative, silicon-proven network-on-chip (NoC) interconnect intellectual property, today announced that Vastai Technologies has licensed Arteris FlexNoC Interconnect IP and the accompanying AI Package for use in its next-generation artificial intelligence and computer vision systems-on-chip (SoCs).

We chose Arteris IP because of their excellent reputation and the maturity of their NoC IP. Using Arteris IP reduced our product costs and shortened our development schedule while allowing us to achieve better performance than we thought was possible. In addition, the Arteris IP team has exceeded our expectations for local technical support and engineering expertise.”


John Qian, CEO, Vastai Technologies

Topics: SoC NoC new customer performance AI chips ML/AI scalable hardware on-chip bandwidth

Arteris IP Ncore® Cache Coherent Interconnect Licensed by Bitmain for Sophon TPU Artificial Intelligence (AI) Chips

Network-on-chip (NoC) interconnect enables faster performance and lower die area for Tensor Processing Unit (TPU) AI/ML applications

CAMPBELL, Calif. June 9, 2019– Arteris IP, the world’s leading supplier of innovative, silicon-proven network-on-chip (NoC) interconnect intellectual property, today announced that Bitmain has licensed Arteris Ncore Cache Coherent Interconnect IP for use in its next-generation Sophon Tensor Processing Unit (TPU) systems-on-chip (SoCs) for the scalable hardware acceleration of artificial intelligence (AI) and machine learning (ML) algorithms.

Our choice of interconnect IP became more important as we continued to increase the complexity and performance of Sophon AI SoCs. The Arteris Ncore cache coherent interconnect IP allowed us to increase our on-chip bandwidth and reduce die area, while being easy to implement in the backend. The Ncore IP’s configurability helped us optimize the die area of our SoC, which permits us to offer our users more performance at lower cost.”


Haichao Wang, CEO, Bitmain

Topics: SoC NoC new customer performance AI chips ML/AI scalable hardware on-chip bandwidth