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Madelyn Miller

Madelyn Miller

Recent Posts by Madelyn Miller:

Semiconductor Engineering: Maximizing Value Post-Moore's Law

Kurt Shuler, Vice President of Marketing at Arteris IP quoted in this new article in Semiconductor Engineering:

Maximizing Value Post-Moore's Law

July 13th, 2020 - By Brian Bailey

The value of a semiconductor can be difficult to measure because it involves costs and benefits over time. As market segments feel different pressures, maximizing value is going in several directions. 

 
“Assessing value is really hard because it is over the lifetime,” says Kurt Shuler, vice president of marketing at Arteris IP. “A lot of chips are disposable. Consider your cell phone. You don’t really care if it’s working 10 years from now. For the data center guys and the AI chips, it’s the same thing. Certain industries do want that chip to last for 15 or 20 years, and that’s automotive, industrial — those kinds of things where there’s a huge capital cost component to that piece of equipment and people are not going to be throwing it away.
 
Topics: SoC IoT ADAS NoC technology semiconductor engineering soc architecture AI kurt shuler data centers noc interconnect IP market chip costs

Semiconductor Engineering: Designing For Extreme Low Power

Kurt Shuler, Vice President of Marketing at Arteris IP comments in this new article in Semiconductor Engineering:

Designing For Extreme Low Power

July 9th, 2020 - By Brian Bailey

Power is becoming a differentiator in many designs, and for IoT and edge devices it may be the most important competitive differentiation. 

 
Most IoT edge devices are basically fairly similar. “The chip basically has sensing, processing and communication,” says Kurt Shuler, vice president of marketing at  Arteris IP . “There is usually one sensor, or multiple sensors attached to it. These things are polling or communicating periodically. They usually have a part of the chip that they call ‘always on’, even though it’s not always on. It’s doing the communications and checking to see if there’s anything from a sensor. Compared to a mobile phone, or some AI chips or an ADAS chip, these chips are not huge. These are really tiny chips, but the power management within them is really complex.”
 
Topics: SoC IoT ADAS NoC technology semiconductor engineering soc architecture kurt shuler noc interconnect IP market

Semiconductor Engineering: Winners and Losers At The Edge

Kurt Shuler, Vice President of Marketing at Arteris IP comments in this new article in Semiconductor Engineering:

Winners and Losers At The Edge

July 7th, 2020 - By Ed Sperling

No company owns this market yet — and won’t for a very long time. 

 
 
“Everything is use-case based when designing the NoC,” said Kurt Shuler, vice president of marketing at  Arteris IP . “You’ve got to understand what the use case is to be able to size up that NoC. There are two aspects of this. One is in the creation of that network on chip and the configuration of it, and what gets burned into the chip. The other step is, once you’ve created all the roads — they’re this long or this wide — that’s it.
 
Topics: SoC automotive NoC technology semiconductor engineering AI kurt shuler noc interconnect ML IP market

Semiconductor Engineering: Variables Complicate Safety-Critical Device Verification

Kurt Shuler, Vice President of Marketing at Arteris IP participates in this new "Experts at the Table" article in Semiconductor Engineering:

Variables Complicate Safety-Critical Device Verification 

July 1st, 2020 - By Ann Steffora Mutschler

What's the best way to approach designs like AI chips for automotive that can stand the test of time? 

 
SE: Where does the industry stand with the task of verifying safety-critical devices today?
 
Kurt Shuler responds, "At the chip level we still have a situation where the verification people and methodologies are separate from the functional safety people and methodologies. This results in some overlap and rework. As tools and data interchange standards (like IEEE P2851 being led by both IEEE and Accellera) mature, we’ll be able to have more automation where functional safety validation through fault injection can be executed as part of regular verification processes. This will help everyone in the industry have more confidence that products don’t regress in diagnostic coverage as new versions are developed and will provide integrators/users of safety-critical systems to more easily perform fault injection validation of safety mechanisms if they desire."
 
Topics: SoC ISO 26262 automotive NoC technology semiconductor engineering ASIL D AI chips noc interconnect IP market IEEE P2851 fault injection

SemiWiki: Where's the Value in Next-Gen Cars?

Bernard Murphy learns more from Kurt Shuler on the shifting landscape in the automotive electronics value chain in this new SemiWiki blog:

Where's the Value in Next-Gen Cars?

June 22th, 2020 - By Bernard Murphy

Value chains can be very robust and seemingly unbreakable – until they’re not. One we’ve taken for granted for many years is the chain for electronics systems in cars. The auto OEM, e.g. Toyota, gets electronics module from a Tier-1 supplier such as Denso. They, in turn, build their modules using chips from a semiconductor chip maker such as Renesas, who produces their chips using pre-packaged functions from IP providers like Arm. Toyota could do the whole thing themselves, but it’s very expensive to set-up and maintain all of that infrastructure. Specialization makes it all more practical. Everyone makes money doing their bit well and cost-effectively and being able to sell to multiple customers (Toyota, GM, BMW, etc.). However, that cash flow can be upended when disruptive innovations are thrown into the supply chain, in this case, a lot more intelligence and autonomy. I talked to Kurt Shuler (VP Marketing at Arteris IP) to get his view. Kurt is an IP supplier and has a unique viewpoint because he works with semis, Tier-1s and OEMs, with standard designs as well as newer AI-based designs. He’s also an active member of the ISO 26262 committee.

 

 

Topics: SoC ISO 26262 semiconductor Ncore mobileye FlexNoC autonomous driving AI semiwiki kurt shuler noc interconnect Tier 1s value-chain

Arteris® IP Advances onto List of Top 15 Semiconductor IP Vendors

Network-on-Chip (NoC) interconnect leader is 12th largest Semiconductor Design Intellectual Property company by revenue according to IPnest

CAMPBELL, Calif. – June 9, 2020 – Arteris IP, the world’s leading supplier of innovative, silicon-proven network-on-chip (NoC) interconnect intellectual property, today announced that the 2020 IPnest Semiconductor Design IP Report has listed Arteris IP as the 12th largest semiconductor IP company worldwide and 2nd behind Arm Holdings in the Chip Infrastructure market category, which includes primarily on-chip interconnect IP.

The fastest-growing IP vendors are specialists in their fields, focusing strongly on new technology and providing world class innovation and product quality. Arteris IP follows this pattern of success by providing the semiconductor industry the technical leadership and advanced capabilities required to assemble the world’s most sophisticated and important systems-on-chip."

Dr. Eric Esteve, Principal Analyst, IPnest

Topics: SoC NoC on-chip interconnect ncore cache coherent interconnect performance IP market Arteris IP FlexNoC interconnect Coda Cache LLC ipnest chip infrastructure semiconductor design ip report

Arteris® IP FlexNoC® Interconnect and AI Package Licensed by Blue Ocean Smart System for AI Chips

State-of-the-art Network-on-Chip (NoC) interconnect enables optimized write broadcast dataflow for AI inference and training hardware accelerator chips

CAMPBELL, Calif. – May 19, 2020 – Arteris IP, the world’s leading supplier of innovative, silicon-proven network-on-chip (NoC) interconnect intellectual property, today announced that Blue Ocean Smart System has licensed Arteris FlexNoC Interconnect IP and the accompanying AI Package for use in next generation systems-on-chip (SoC) that hardware accelerate artificial intelligence (AI) neural network inference and training.

From prior experience, I knew that Arteris interconnect IP was the best solution to construct complex high frequency and high bandwidth on-chip interconnects that were backend friendly for easier timing closure. The addition of the AI Package allows us to finely tune our chip architecture using multicast write semantics which greatly reduce off-chip memory accesses while using little die area and consuming much less power. Our use of Arteris FlexNoC and the AI Package has been key to turning our architectural dreams into system-on-chip reality.”


John Rowland, President, Blue Ocean Smart

Topics: SoC NoC on-chip interconnect new customer memory machine learning neural network performance high-bandwidth Arteris IP FlexNoC interconnect AI inference accelerate

Arteris® IP FlexNoC® Interconnect Licensed by Picocom for 5G New Radio Infrastructure Baseband SoCs

State-of-the-art Network-on-Chip (NoC) interconnect enables complex high-speed, yet flexible design

CAMPBELL, Calif. – May 12, 2020 – Arteris IP, the world’s leading supplier of innovative, silicon-proven network-on-chip (NoC) interconnect intellectual property, today announced that Picocom has licensed Arteris FlexNoC Interconnect IP for use in its upcoming 5G New Radio (5G NR) small cell baseband system-on-chip (SoC). Picocom specializes in 5G wireless baseband technologies for open small cell radio access networks.

Arteris interconnect IP was a smart choice to assist us in overcoming the design intricacies of the evolving 5G NR standard for our silicon. It is enabling us to manage our on-chip SoC bandwidth and complexity, whilst allowing us to retain design flexibility. In addition, it has helped us reduce development time, a crucial achievement in the fast-paced 5G NR market.”


Yingbo Jiang, CEO, Picocom

Topics: SoC NoC new customer enterprise SSD low power bandwidth performance high-bandwidth 5G Arteris IP FlexNoC interconnect base station wireless baseband

Arteris® IP FlexNoC® Interconnect Again Licensed by NETINT Technologies for Codensity Enterprise SSD Controllers

State-of-the-art Network-on-Chip (NoC) technology enables next-generation of SSD controllers for high density real-time 4K H.265 video transcoding and storage

CAMPBELL, Calif. – March 24, 2020 – Arteris IP, the world’s leading supplier of innovative, silicon-proven network-on-chip (NoC) interconnect intellectual property, today announced that NETINT Technologies has once again licensed Arteris IP FlexNoC Interconnect for use in its next-generation of enterprise solid state disk (SSD) storage system controllers with on-chip video encoding processors. NETINT’s first purchase of Arteris IP interconnect licenses was announced in January of 2019 (see, “Arteris IP FlexNoC® Interconnect Licensed by NETINT Technologies for PCIe 4.0 Enterprise SSD Controllers”).

Our Codensity G4 D400 SSDs were the industry’s first SSDs supporting a PCIe 4.0 interface, and our next-generation SSD controllers will push technology boundaries even more. Arteris FlexNoC interconnect IP has been critical to our products’ success because it enables the high bandwidth, low latency and data protection required for our systems. The flexibility of Arteris FlexNoC has allowed us to implement more sophisticated SoC architectures in less time that would otherwise be possible, thereby allowing us to create higher margin chips with less engineering effort.”


Tao Zhong, CEO, NETINT

Topics: SoC NoC new customer enterprise SSD low power performance high-bandwidth on-chip video encoding Arteris IP FlexNoC interconnect

Arteris® IP FlexNoC® Interconnect & Resilience Package Licensed by SiEngine for ISO 26262-Compliant Automotive Systems

State-of-the-art Network-on-Chip (NoC) interconnect increases chip performance, reduces design schedules, and provides functional safety mechanisms

CAMPBELL, Calif. – February 4, 2020 – Arteris IP, the world’s leading supplier of innovative, silicon-proven network-on-chip (NoC) interconnect intellectual property, today announced that SiEngine has licensed the Arteris IP FlexNoC interconnect and the accompanying FlexNoC Resilience Package for use as the on-chip dataflow backbone of its next-generation automotive systems-on-chip (SoC).

We chose Arteris FlexNoC IP and the Resilience Package because of its integrated functional safety mechanisms and its ability to reduce on-chip routing congestion and increase performance. We are pleasantly surprised by the product’s rich functionality, flexible configuration and the excellent support from Arteris IP’s engineers, which allow us to achieve the specifically required functions with competitive performance.”


Xin-xin Yang, R&D Vice President, SiEngine

Topics: SoC NoC new customer automotive ISO 26262 resilience package performance AI chips ML/AI