Latest News

Semiconductor Engineering: End-To-End Traceability Video

Ed Sperling and Kurt Shuler, VP of Marketing at Arteris IP discuss new technology and standards in this video with Semiconductor Engineering:

End-To-End Traceability Video

November 29th, 2021 - By Ed Sperling

How to deal with gaps that can impact reliability.


Despite standards such as ISO 26262 and IEC 61508, there are still disconnects and gaps in the supply chain and design-through-manufacturing flows. Kurt Shuler, vice president of marketing at Arteris IP, digs into what’s missing, why changes made in one area are not reflected in other areas and throughout the product lifecycle, and why various different phases of the flow don’t always match up with the initial requirements.

Topics: ISO 26262 network-on-chip automotive reliability semiconductor engineering arteris ip SoCs kurt shuler IEC 61508 security traceability NoCs Arteris IP (AIP) Arteris IP Harmony Trace

SemiWiki: Traceability and ISO 26262

Bernard Murphy (SemiWiki) and Kurt Shuler, VP of Marketing at Arteris IP, talk about the growing importance of traceability to ISO 26262 and safety.

Traceability and ISO 26262

November 29, 2021 - Bernard Murphy

Since traceability and its relationship to ISO 26262 may be an unfamiliar topic for many of my readers, I thought it might be useful to spend some time on why this area is important. What is the motivation behind a need for traceability in support of automotive systems development? The classic verification and validation V-diagram is a useful starting point for understanding. The left arm of the V decomposes system design from concepts into requirements, architecture, and detailed design. The right arm represents verification and validation steps from unit testing all the way up to full system validation. Tracing compliance with requirements through this full flow requires new kinds of automation.
 
To learn more, click HERE.
Topics: SoC NoC ISO 26262 network-on-chip semiconductor automotive arteris ip semiwiki ip-xact kurt shuler compliance noc interconnect design teams Arteris IP Harmony Trace ISO 26262 auditors

Semiconductor Engineering: Zonal Architectures Play Key Role in Vehicle Security

Kurt Shuler, VP of Marketing at Arteris IP is quoted in this new article in Semiconductor Engineering:

Zonal Architecture Play Key Role in Vehicle Security

November 17th, 2021 - By Ann Steffora Mutschler

Will zonal architectures in automotive applications provide unique benefits to cybersecurity? 


“It’s cybersecurity at the IP level, at the SoC level, at the board level, different levels within the different software modules,” said Kurt Shuler, vice president of marketing at Arteris IP. “It must be a real ‘belt-and-suspenders’ approach.”

Topics: network-on-chip automotive semiconductor engineering arteris ip SoCs kurt shuler security NoCs Arteris IP (AIP) ISO

Arteris® IP Helps Automate System-on-Chip Semiconductor Design Traceability with Harmony Trace™️ Design Data

Enterprise-level server-based application increases system quality and enables faster Functional Safety Certifications by creating and maintaining traceability between different systems.

CAMPBELL, Calif. – November 16, 2021 – Arteris IP (NASDAQ: AIP), a leading provider of system-on-chip (SoC) system IP consisting of network-on-chip (NoC) interconnect and IP deployment software that accelerate SoC creation, today announced the launch of the Arteris® Harmony Trace™️ Design Data Intelligence Solution to ease compliance with semiconductor industry functional safety and quality standards such as ISO 26262, IEC 61508, ISO 9001, and IATF 16949.

Topics: NoC functional safety ISO 26262 arteris ip traceability Nasdaq AIP IP development software enterprise level data design intelligence solution Harmony Trace

Semiconductor Engineering: What Is An XPU?

Michael Frank, Fellow and System Architect at Arteris IP is quoted throughout this new article in Semiconductor Engineering:

What Is An XPU? 

November 11th, 2021 - By Brian Bailey

Almost every letter of the alphabet has been used to describe a processor architecture, but under the hood they all look very similar.


“Most of these things are not really a processor in the sense of being a CPU,” says Michael Frank, fellow and system architect at Arteris IP. “They’re more like a GPU, an accelerator for a special workload, and there is quite a bit of diversity within them. Machine learning is a class of processors, and you just call them all machine learning accelerators, yet there is a large variety of the part of the processing they accelerate.”


Topics: network-on-chip GPU semiconductor engineering arteris ip CPUs SoCs accelerators DSP Michael Frank NoCs Arteris IP (AIP)

Yahoo Finance: Tesla is not a car company — it's an 'internet-of-cars company:' Arteris CEO

Arteris IP CEO Charlie Janac was quoted and interviewed for this video interview and article by Yahoo Finance where he explains how the "Internet of Cars" is driven by semiconductors:

Tesla is not a car company — it's an 'internet-of-cars company:' Arteris CEO

October 29th, 2021 - By Pras Subramanian, Yahoo Finance Producer/Reporter

It's been a huge week for Tesla (TSLA). 

Shares jumped to new highs as the market cap of the pure-play electric vehicle maker topped $1 trillion for the first time, making it the 5th most valuable company in the S&P 500 (^GSPC) — and sending Elon Musk's personal fortune north of $300 billion...

Topics: SoC automotive SystemC arteris ip K. Charles Janac IPO Tesla internet of cars

Arteris IP Announces Pricing of Initial Public Offering

CAMPBELL, Calif. – October 26, 2021 – Arteris IP, a leading provider of system-on-chip (SoC) system IP consisting of network-on-chip (NoC) interconnect and IP deployment software that accelerate SoC creation, today announced the pricing of its initial public offering of 5,000,000 shares of its common stock at a price to the public of $14.00 per share. The gross proceeds to Arteris IP from the offering, before deducting the underwriting discounts and commissions and offering expenses, are expected to be $70.0 million. All of the shares are being offered by Arteris IP. In addition, Arteris IP has granted the underwriters a 30-day option to purchase up to 750,000 additional shares of its common stock at the initial public offering price, less underwriting discounts and commissions.

Topics: arteris ip Nasdaq AIP stock arteris IPO AIP IPO pricing

Arteris® IP FlexNoC® Interconnect Licensed by Eyenix for AI-Enabled Imaging/Digital Camera SoC

NoC interconnect IP to be dataflow backbone for image signal processors providing enhanced sensitivity, high-resolution HD imaging through low current, low power in a single-chip solution for the security/surveillance market.

CAMPBELL, Calif. – October 19, 2021 – Arteris IP, a leading provider of system-on-chip (SoC) system IP consisting of network-on-chip (NoC) interconnect and IP deployment software that accelerate SoC creation, today announced that imaging SoC leader Eyenix has licensed FlexNoC interconnect IP for its next-generation image processing system-on-chip (SoC).

Eyenix’s mission is to bring a seamless high-resolution and high-performance imaging solution to super-enhanced HD video, surveillance, consumer and advanced imaging applications. Arteris NoC IP helped us to design complex AI functions and smoothly integrate all the advanced functions we created to deliver this state-of-the-art image signal processor system-on-chip. Arteris IP engineering support has been very responsive and helpful throughout our evaluation and development processes."


Dr. Jon Hwang, CEO, Eyenix

Topics: Arteris FlexNoC new customer AI SoCs noc interconnect high-bandwidth cameras consumer Eyenix mobile usage image processing IP blocks HD video

Arteris IP Announces Filing of Registration Statement for Proposal Initial Public Offering

CAMPBELL, Calif. – October 4, 2021 – Arteris IP, a leading provider of system-on-chip (SoC) system intellectual property ("IP") consisting of network-on-chip (NoC) interconnect IP and IP deployment software, today announced it has publicly filed a registration statement on Form S-1 with the U.S. Securities and Exchange Commission ("SEC") relating to a proposed initial public offering of its common stock. The number of shares to be offered and the price range for the proposed offering have not yet been determined. Arteris IP has applied to list its common stock on the Nasdaq Global Market under the ticker symbol "AIP".

Topics: SoC interconnect IP NoC arteris ip K. Charles Janac IP market ip deployment Nick Hawkins Nasdaq S-1 SEC AIP intellectual property IP IPO

Arteris® IP Announces 4D LiDAR Pioneer Aeva as its 200th Customer

4D LiDAR innovator licenses Arteris IP FlexNoC Interconnect to enable pioneering system-on-chip (SoC) for digital data processing

CAMPBELL, Calif. – September 28, 2021 – Arteris IP, a leading provider of network-on-chip (NoC) interconnect and other intellectual property (IP) technology that manages the on-chip communications in digital system-on-chip (SoC) semiconductor devices, today announced that 4D LiDAR innovator Aeva Technologies, Inc., has licensed FlexNoC interconnect IP for its next-generation digital processing system-on-chip (SoC).

Aeva's mission is to bring the next wave of perception to all devices through our innovative and scalable 4D LiDAR on chip technology. Arteris NoC IP helps us to integrate complex functions on a single digital processing chip and Arteris IP engineering support has been quite proactive"


Syrus Ziai, Vice President of Silicon Engineering, Aeva

Topics: functional safety Arteris FlexNoC new customer LIDAR SoCs noc interconnect Aeva 200th customer low power consumption Time-to-flight 4D Lidar