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Arteris Newsroom

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Newsroom
    Announcements

    Press Releases

    Stay informed with the latest announcements on Arteris’ key achievements, strategic partnerships, and game-changing innovations.
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    Arteris announces the expansion of its third-party IP (3PIP) security assurance program in collaboration with BAE Systems and SiFive, Inc.
    Arteris Wins Funding to Expand Hardware Design Supply Chain Security Assurance for the Trusted and Assured Microelectronics Program
    Arteris announces the expansion of its third-party IP (3PIP) security assurance program in collaboration with BAE Systems and SiFive, Inc.
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    Arteris Accelerates Industry Transition to Multi-Die Chiplet-Based Architecture
    Arteris Accelerates Industry Transition to Multi-Die Chiplet-Based Architecture
    Arteris expands its multi-die portfolio with FlexGen Multi-Die, enabling efficient data movement and QoS as semiconductor designs shift from monolithic SoCs to chiplets.
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    Arteris Appoints Saurabh Sinha as Chief Financial Officer
    Arteris Appoints Saurabh Sinha as Chief Financial Officer
    Arteris announced the appointment of Saurabh Sinha as Chief Financial Officer, effective September 8, 2026.
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    Arteris Deployed by Speedata for Data Center Compute
    Arteris Deployed by Speedata for Data Center Compute
    Arteris network-on-chip IP supports scalable high-performance data movement in Speedata’s purpose-built Analytics Processing Unit for large-scale data analytics workloads.
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    Articles

    Blogs

    Connect with expert insights, emerging trends, and in-depth analysis driving the evolution of the semiconductor industry.
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    From Bug Hunting to Engineering Methodology
    From Bug Hunting to Engineering Methodology: Lessons from AI-Driven Development 
    This article explains how AI can speed up engineering research and bug discovery when engineers can verify the results. Drawing on the work developing Arteris’ JIG C++ verification library, it shows how built-in checks give AI clear criteria to explore
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    Data Center AI at the Power Limit: When Data Movement Defines Performance
    HPCwire: Data Center AI at the Power Limit: When Data Movement Defines Performance
    This article explains how power limits are reshaping data center AI design, making efficient, predictable data movement across heterogeneous compute, memory and chiplet architectures central to system performance. He highlights the role of intelligent interconnect and automation in keeping compute
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    A Network-on-Chip (NoC) For Multi-Die Devices
    Semiconductor Engineering: A Network-on-Chip (NoC) For Multi-Die Devices
    This article explains how extending native NoC packet traffic across die boundaries can support efficient, scalable data movement for multi-die systems, especially physical AI and automotive platforms.
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    SoC and NoC in the Chiplet Era: Understanding Modern SoC Architecture
    Learn how SoCs and NoCs work together in modern semiconductor design and why chiplet-based architectures make intelligent data movement more critical than ever.
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    The Cyber Resilience Act Is Turning Hardware Security into an Evidence Question
    The Cyber Resilience Act Is Turning Hardware Security into an Evidence Question
    A passing security test has two explanations. As the EU Cyber Resilience Act takes effect, security coverage shows what hardware verification actually reached
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    Beyond the Die Boundary How Arteris Multi-Die Technology Is Redefining AI System Design
    Beyond the Die Boundary: How Arteris Multi-Die Technology Is Redefining AI System Design 
    See why the Arteris Multi-Die Solution earned a Stevie Award for helping design teams turn complex chiplet architectures into unified systems with scalable data movement, streamlined integration, and a predictable path to silicon.
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    Latest News

    In the News

    Catch the latest news headlines on Arteris’ advancements, industry-leading impact, and key developments.
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    ChipEstimate: Arteris Wins Funding to Expand Hardware Design Supply Chain Security Assurance for the Trusted and Assured Microelectronics Program
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    Semicon Insider: Arteris, BAE Systems, and SiFive Expand 3PIP Security Assurance
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    Markets Insider: Arteris Wins Funding to Expand Hardware Design Supply Chain Security Assurance for the Trusted and Assured Microelectronics Program
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    SemiWiki: Arteris Wins Funding to Expand Hardware Design Supply Chain Security Assurance for the Trusted and Assured Microelectronics Program
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    National Defense Digital: AI Can Now Hunt the Flaws in Chips We Fielded a Decade Ago
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    Semiconductor Engineering: AI-Defined Vehicles Push Compute, Memory, And Validation Limits
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    Gina Jacobs

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    +1 408 560 3044
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