What is Network-on-Chip (NoC) technology?
NoC technology is often called “a front-end solution to a back-end problem.” As semiconductor transistor dimensions shrink and increasing amounts of IP block functions are added to a chip, the physical infrastructure that carries data on the chip and guarantees quality of service begins to crumble. Many of today's systems-on-chip are too complex to utilize a traditional hierarchal bus or crossbar interconnect approach. Yesterday's village traffic has turned into today's congested freeways.
Arteris network-on-chip technology is characterized by these technological features:
- Separation of transaction, transport and physical layers
- Packetization of data, which enables variable bit-widths through flexible serialization
- Support for any transaction prototocol, whether ARM AMBA, OCP, or proprietary
The Arteris interconnect IP offers us a convenient solution to handle the high speed communication needed between our SoC and external modem IC. Our customers will benefit from the lower BOM cost and power consumption as a result of this IP. We look forward to Arteris’ interconnect IP helping us shorten development schedules and lower risks associated with compatibility.
Thomas Kim, Vice President, SoC Platform Development, System LSI, Samsung Electronics