Goal is more efficient and timely commercialization of Through-Silicon Via (TSV) technology using Arteris Network-on-Chip (NoC) interconnect IP & tool products
SUNNYVALE, California – December 6, 2011 – Arteris Inc., the inventor and leading supplier of network-on-chip (NoC) interconnect IP solutions, today announced that it is collaborating with TSMC by incorporating Arteris’ FlexNoC Network–on-Chip (NoC) interconnect IP into an SoC die on silicon interposer test chip.
TSMC chose to work with Arteris on the interposer based test chip program because its interconnect technology is ideally suited to addressing the SoC wire routing congestion and timing closure challenges. TSMC and Arteris are working together to make it easier for our joint customers to adopt these technologies.
Suk Lee, Director of Design Infrastructure Marketing, TSMC