Arteris Press Releases

Arteris IP's Stefano Lorenzini to Speak at Automotive IQ Application of ISO 26262 Berlin Conference

CAMPBELL, Calif. – April 25, 2022 – Arteris IP (NASDAQ: AIP), a leading provider of system IP consisting of network-on-chip (NoC) interconnect and IP deployment software that accelerate system-on-chip (SoC) creation, today announced that Functional Safety Manager Stefano Lorenzini will present at the Automotive IQ Application of ISO 26262 Conference on Wednesday, April 27, 2022, at Hilton Berlin, Germany. His keynote presentation, Automating the Generation of Scalable and Reusable FMEDA in Complex Systems-on-Chip, begins at 11:15 (CEST).

Topics: SoC System-on-Chip NoC functional safety ISO 26262 SoC design Networks-On-Chip soc architecture arteris ip functional safety manager FMEDA IEC 61508 ip deployment Stefano Lorenzini AIP Berlin Conference Automotive IQ

Claudia Fan Munce Joins Arteris IP Board of Directors

Veteran executive, Stanford lecturer and public company board member brings decades of relevant international corporate experience to Arteris IP

CAMPBELL, Calif. – April 5, 2022 – Arteris IP (NASDAQ: AIP), a leading provider of system IP consisting of network-on-chip (NoC) interconnect and IP deployment software that accelerate system-on-chip (SoC) creation, today announced that Claudia Fan Munce will join Arteris IP’s Board of Directors and will commence her service at the company’s May 2022 board and committee meetings.

 

I’m very excited to welcome Claudia Fan Munce with her publicly traded company board stewardship and technology management experience to guide Arteris to the next stage in achieving our goals."


K. Charles Janac, President and CEOArteris IP

Topics: SoC System-on-Chip NoC network-on-chip K. Charles Janac Board of Directors Arteris IP (AIP) Best Buy Corporation BNP Paribas Christian Claussen Claudia Fan Munce IBM New Enterprise Associates Bank of the West Stanford University

Arteris® IP FlexNoC® Interconnect and Resilience Package Licensed in Neural Network Accelerator Chip Project Led by BMW Group

NoC interconnect IP to be dataflow backbone of German Federal Ministry of Education and Research (BMBF) project chip to advance automotive artificial intelligence and machine learning (AI/ML) processing.

CAMPBELL, Calif. – April 5, 2022 – Arteris IP (NASDAQ: AIP), a leading provider of system-on-chip (SoC) system IP consisting of network-on-chip (NoC) interconnect and IP deployment software that accelerate SoC creation, today announced that BMW Group has licensed FlexNoC interconnect IP and the accompanying FlexNoC Resilience Package IP for use in a chip partially funded by the German Federal Ministry of Education and Research (BMBF) as part of the ZUSE-KI-mobil publicly funded project. The goal of the project is to develop an accelerator chip for high-end deep learning applications that is a leap forward in terms of energy efficiency, reliability, robustness and security, which go far beyond current possibilities. BMW Group is serving as the coordinator and leader of the project.

We are excited that the consortium led by BMW Group chose Arteris IP interconnect technology as the on-chip communications on-chip network for this innovative automotive system-on-chip. BMW Group’s decision to use our interconnect IP as the dataflow on-chip network of this complex system is a testimony to the benefits our technologies bring to design teams creating the world’s most sophisticated AI/ML processing chips."


K. Charles Janac, President and CEO, Arteris IP

Topics: System-on-Chip functional safety Arteris FlexNoC automotive flexnoc resilience package reliability machine learning artificial intelligence neural network AI latency SoCs power efficiency noc interconnect on-chip communications dataflow Arteris IP FlexNoC interconnect AI/ML ip deployment mobile usage IP blocks system ip Arteris IP (AIP) BMW Group ZUSE-KI-mobil processing chips BMBF