CAMPBELL, California — December 2, 2014 — Arteris Inc., the inventor and only supplier of silicon-proven commercial network-on-chip (NoC) interconnect IP solutions, today announced that it has completed the recruitment and hiring of its engineering team that is creating complementary products to the Arteris® FlexNoC® fabric IP, through efforts in hardware development, hardware verification and software development.
With experience from battery-operated smartphones to high-performance computing servers, our ranks are filled with the best interconnect experts from the likes of Apple, Intel, Broadcom, Huawei, SGI, and others.
With a special emphasis on configurable on-chip memory communications, the new team of engineers will carry out efforts spearheaded by the company’s engineering leadership, and continue the Arteris tradition of introducing innovation to critical areas of SoC design and assembly.
“Arteris has assembled an engineering team with some of the most accomplished and innovative people in the realm of on-chip communications,” K. Charles Janac, President and CEO of Arteris. “With experience from battery-operated smartphones to high-performance computing servers, our ranks are filled with the best interconnect experts from the likes of Apple, Intel, Broadcom, Huawei, SGI, and others. Our team members have a proven track record, having designed and built over fifteen commercially successful products implementing leading-edge technology for virtualization, cache coherency, heterogeneous multiprocessing, and security.”
Arteris, Inc. provides Network-on-Chip interconnect IP and tools to accelerate System-on-Chip semiconductor (SoC) assembly for a wide range of applications. Rapid semiconductor designer adoption by customers such as Samsung, Altera, and Texas Instruments has resulted in Arteris being the only semiconductor IP company to be ranked in the Inc. 500 and Deloitte Technology Fast 500 lists in 2012 and 2013. Customer results obtained by using the Arteris product line include lower power, higher performance, more efficient design reuse and faster SoC development, leading to lower development and production costs. More information can be found at www.arteris.com.
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