Arteris Press Releases

Arteris Ncore Cache Coherent Interconnect IP enabled by ARM’s Cycle Models

Cycle-accurate SystemC models power highly scalable verification and performance optimization infrastructure

CAMPBELL, California — May 24, 2016 — Arteris Inc., the innovative supplier of silicon-proven commercial system-on-chip (SoC) interconnect IP, today announced that it has used ARM® Cycle Models for use in hardware and performance verification Ncore™ Cache Coherent Interconnect IP.

ARM Cycle Models provide early, secure access to ARM’s leading edge IP. Enabling Arteris to integrate this technology into their development infrastructure highlights ARM’s commitment to enabling design optimization, time-to-market and cost-efficiency gains for our ecosystem partners.

Javier Orensanz, General Manager, Development Solutions GroupARM

Topics: Arm new product AMBA ACE protocol cache coherent IP ARM cycle models Ncore cycle accurate simulation heterogeneous cache coherency cache coherency cache coherent interconnect system level modeling