Arteris Press Releases

Arteris Redefines Heterogeneous Multicore Cache Coherency with Configurable, Distributed Semiconductor Architecture

Technology increases area and power efficiency of systems built with semiconductor IP from multiple sources

CAMPBELL, California — May 17, 2016 — Arteris Inc., the innovative supplier of silicon-proven commercial system-on-chip (SoC) interconnect IP, today introduced a semiconductor design technology that enhances the ability of SoC architects to create efficient cache-coherent systems with IP sourced from multiple vendors. Allowing the industry’s first distributed heterogeneous cache-coherent interconnect, the new technology helps designers achieve higher frequency, lower power consumption and reduced time-to-market in producing differentiated SoCs that span multiple design domains such as mobility, HDTV, enterprise storage, automotive advanced driver assistance systems (ADAS), micro-server and networking markets.

The exploding cost of the latest semiconductor process nodes is forcing design teams to evaluate new architectural approaches for SoC design. The distributed cache coherent architecture that Arteris offers will help system designers better utilize the processing resources in the SoC, making computing throughput more efficient.

Linley Gwennap, Principal AnalystThe Linley Group

Topics: new product cache coherent IP heterogeneous cache coherency cache coherency cache coherent interconnect