Arteris Press Releases

Arteris IP's Stefano Lorenzini to Speak at Automotive IQ Application of ISO 26262 Berlin Conference

CAMPBELL, Calif. – April 25, 2022 – Arteris IP (NASDAQ: AIP), a leading provider of system IP consisting of network-on-chip (NoC) interconnect and IP deployment software that accelerate system-on-chip (SoC) creation, today announced that Functional Safety Manager Stefano Lorenzini will present at the Automotive IQ Application of ISO 26262 Conference on Wednesday, April 27, 2022, at Hilton Berlin, Germany. His keynote presentation, Automating the Generation of Scalable and Reusable FMEDA in Complex Systems-on-Chip, begins at 11:15 (CEST).

Topics: SoC System-on-Chip NoC functional safety ISO 26262 SoC design Networks-On-Chip soc architecture arteris ip functional safety manager FMEDA IEC 61508 ip deployment Stefano Lorenzini AIP Berlin Conference Automotive IQ

Arteris® IP FlexNoC® Interconnect and Resilience Package Licensed in Neural Network Accelerator Chip Project Led by BMW Group

NoC interconnect IP to be dataflow backbone of German Federal Ministry of Education and Research (BMBF) project chip to advance automotive artificial intelligence and machine learning (AI/ML) processing.

CAMPBELL, Calif. – April 5, 2022 – Arteris IP (NASDAQ: AIP), a leading provider of system-on-chip (SoC) system IP consisting of network-on-chip (NoC) interconnect and IP deployment software that accelerate SoC creation, today announced that BMW Group has licensed FlexNoC interconnect IP and the accompanying FlexNoC Resilience Package IP for use in a chip partially funded by the German Federal Ministry of Education and Research (BMBF) as part of the ZUSE-KI-mobil publicly funded project. The goal of the project is to develop an accelerator chip for high-end deep learning applications that is a leap forward in terms of energy efficiency, reliability, robustness and security, which go far beyond current possibilities. BMW Group is serving as the coordinator and leader of the project.

We are excited that the consortium led by BMW Group chose Arteris IP interconnect technology as the on-chip communications on-chip network for this innovative automotive system-on-chip. BMW Group’s decision to use our interconnect IP as the dataflow on-chip network of this complex system is a testimony to the benefits our technologies bring to design teams creating the world’s most sophisticated AI/ML processing chips."


K. Charles Janac, President and CEO, Arteris IP

Topics: System-on-Chip functional safety Arteris FlexNoC automotive flexnoc resilience package reliability machine learning artificial intelligence neural network AI latency SoCs power efficiency noc interconnect on-chip communications dataflow Arteris IP FlexNoC interconnect AI/ML ip deployment mobile usage IP blocks system ip Arteris IP (AIP) BMW Group ZUSE-KI-mobil processing chips BMBF

Arteris® IP Helps Automate System-on-Chip Semiconductor Design Traceability with Harmony Trace™️ Design Data

Enterprise-level server-based application increases system quality and enables faster Functional Safety Certifications by creating and maintaining traceability between different systems.

CAMPBELL, Calif. – November 16, 2021 – Arteris IP (NASDAQ: AIP), a leading provider of system-on-chip (SoC) system IP consisting of network-on-chip (NoC) interconnect and IP deployment software that accelerate SoC creation, today announced the launch of the Arteris® Harmony Trace™️ Design Data Intelligence Solution to ease compliance with semiconductor industry functional safety and quality standards such as ISO 26262, IEC 61508, ISO 9001, and IATF 16949.

Topics: NoC functional safety ISO 26262 arteris ip traceability Nasdaq AIP IP development software enterprise level data design intelligence solution Harmony Trace

Arteris® IP Announces 4D LiDAR Pioneer Aeva as its 200th Customer

4D LiDAR innovator licenses Arteris IP FlexNoC Interconnect to enable pioneering system-on-chip (SoC) for digital data processing

CAMPBELL, Calif. – September 28, 2021 – Arteris IP, a leading provider of network-on-chip (NoC) interconnect and other intellectual property (IP) technology that manages the on-chip communications in digital system-on-chip (SoC) semiconductor devices, today announced that 4D LiDAR innovator Aeva Technologies, Inc., has licensed FlexNoC interconnect IP for its next-generation digital processing system-on-chip (SoC).

Aeva's mission is to bring the next wave of perception to all devices through our innovative and scalable 4D LiDAR on chip technology. Arteris NoC IP helps us to integrate complex functions on a single digital processing chip and Arteris IP engineering support has been quite proactive"


Syrus Ziai, Vice President of Silicon Engineering, Aeva

Topics: functional safety Arteris FlexNoC new customer LIDAR SoCs noc interconnect Aeva 200th customer low power consumption Time-to-flight 4D Lidar