Arteris Press Releases

Arteris IP FlexNoC® & Resilience Package Support SemiDrive ISO 26262-Compliant Chip Production

CAMPBELL, Calif. – September 22, 2020 – Arteris IP, the world’s leading supplier of innovative, silicon-proven network-on-chip (NoC) interconnect intellectual property, today announced that SemiDrive’s new ISO 26262-compliant smart e-cockpit, central gateway, autonomous driving and ADAS chips are powered by Arteris® FlexNoC® interconnect IP and the accompanying Resilience Package as the on-chip communications backbone.

We were very successful using Arteris IP NoC technology to optimize our chip’s bandwidth, latency and power consumption to meet the real time requirements of autonomous driving. Furthermore, the Arteris IP team was professional and diligent in helping us through the functional safety IP validation process which facilitated our ISO 26262 compliance process.”

Maggie Qui CEO, SemiDrive

Topics: functional safety ISO 26262 Arteris FlexNoC new customer flexnoc resilience package ADAS autonomous driving SoCs SoC chips on-chip communications dataflow e-cockpit

Silicon-Proven Arteris IP Ncore ® Cache Coherent Interconnect Implemented in Toshiba ISO 26262-Compliant ADAS Chip

Toshiba tapes out next-generation automotive ADAS system-on-chip (SoC) using mature network-on-chip interconnect technology

CAMPBELL, Calif. — June. 11, 2019 — Arteris IP, the world’s leading supplier of innovative, silicon-proven network-on-chip (NoC) interconnect semiconductor intellectual property, today announced that Toshiba has taped out its next generation automotive advanced driver assistance system (ADAS) chip using the Arteris IP Ncore Cache Coherent and FlexNoC®non-coherent interconnect with the associated Resilience Package.

Our use of the uniquely flexible Ncore cache coherent interconnect IP helped us to more quickly design and implement our next generation automotive ADAS chips while allowing us to increase hardware diagnostic coverage for ISO 26262 compliance. The Arteris IP team was very helpful in guiding us on the interconnect configuration to optimize system performance and hardware diagnostic coverage using the integrated functional safety mechanisms. Working with the highly professional Arteris team and their world class interconnect IP has helped us meet our performance requirements and schedule, while adding valuable capabilities that would not be possible with other interconnects.

Nobuaki Otsuka, Technology Executive at Electronic Device & Storage Corporation, Toshiba

Topics: SoC ISO 26262 automotive semiconductors japan flexnoc resilience package ADAS cache coherent interconnect advanced driver assistance systems adas imaging processor ncore cache coherent interconnect

ArterisIP and ResilTech to Present at ISO 26262 Semiconductors Conference

Automotive IQ 1st Annual International Conference on the Application of ISO 26262 to Semiconductors (Dec. 5-7) to feature fault simulation lessons learned

CAMPBELL, Calif. and PONTEDERA, Italy — November 28, 2017 — ArterisIP, the innovative supplier of silicon-proven commercial system-on-chip (SoC) interconnect IP, and ResilTech S.R.L., the leader in resilient computing and functional safety for automotive systems, will jointly present at Automotive IQ’s Application of ISO 26262 to Semiconductors conference on December 5th through the 7th, 2017, in Munich, Germany.

As automotive systems-on-chip increase in size and complexity, it has become increasingly important to perform safety analyses using executable models of IPs, and to define standard formats to exchange information between IP suppliers and SoC integrators.

Francesco Rossi, Automotive Safety Solution Manager, ResilTech

Topics: functional safety ISO 26262 ResilTech ISO 26262 compliance ISO 26262 specification

ArterisIP Advances Machine Learning SoC Design with Ncore 2.0 Cache Coherent Interconnect and Resilience Package

SoC interconnect IP enables highly scalable neural network systems with integrated hardware functional safety features for ISO 26262 ASIL D compliance

Linley Autonomous Hardware Conference 2017, SANTA CLARA, Calif. — April 6, 2017 — ArterisIP, the innovative supplier of silicon-proven commercial system-on-chip (SoC) interconnect IP, today announced the Ncore 2.0 Cache Coherent Interconnect IP and the optional Ncore Resilience Package to accelerate and enhance the creation of next-generation designs for autonomous driving systems and advanced driver assistance systems (ADAS).

We are very impressed with the new ArterisIP Ncore interconnect IP technologyArterisIP Ncore 2.0 interconnect IP offers even higher scalability along with the Coherent Memory Cache, which reduces DRAM accesses while maintaining area efficiency.

Mr. Yu Li, Vice President, Sanechips (Subsidiary of ZTE)

Topics: ISO 26262 new product machine learning Ncore automotive functional safety ArterisIP ncore resilience package neural networks