Arteris Press Releases

Arteris IP Announces 8 New Licensees, 2 New Products in 2017

Semiconductor IP leader's growth driven by artificial intelligence and autonomous driving systems-on-chip (SoC)

CAMPBELL, Calif. — January 17, 2018 — Arteris IP, the innovative supplier of silicon-proven commercial system-on-chip (SoC) interconnect IPtoday announced that it added eight new licensees for Arteris Ncore and FlexNoC Interconnect semiconductor intellectual property (IP) products in 2017. Arteris IP customers added during 2017 include Chinese artificial intelligence and machine learning pioneers Cambricon and Intellifusion, IoT security and Trusted Platform Module (TPM) vendor Nationz Technologies, and five as-of-yet undisclosed customers. This trend matches previous years where Arteris added nine new licensees annually in 2014, 2015 and 2016. These new customers, and the addition of new license contracts with existing licensees, enabled Arteris IP to achieve cash flow positive operation in 2017 while investing heavily in new product development.

Arteris IP bookings reached the highest level in company history in 2017.

K. Charles Janac, President and CEOArteris IP

Topics: new customer china Ncore PIANO timing closure package flexnoc interconnect ISO 26262 resilience package

Arteris Announces PIANO™ 2.0 Automated Interconnect Timing Closure Technology

CAMPBELL, Calif. — March 8, 2017 — Arteris Inc., the innovative supplier of silicon-proven commercial system-on-chip (SoC) interconnect IP, today announced its next generation automated interconnect timing solution – the PIANO 2.0 Timing Closure Package. PIANO 2.0 builds on customer silicon experience gathered with FlexNoC Physical package to automate interconnect timing closure for both cache coherent and non-coherent subsystems.

By applying PIANO 2.0 together with generated placement guides, Renesas was able to close the complex SoC development sooner than we expected. Renesas has been an early user of Arteris’ closure technology, and we plan to continue to use Arteris’ enhanced closure capabilities for our future SoC developments.

Horst Rieger, Manager, Design Services, European Technology Center, Renesas Electronics Europe

Topics: Arteris FlexNoC timing closure new product Ncore PIANO timing closure package