Complex software algorithms must control a growing array of specialized processors and hardware accelerators to deliver a robust product. The hardware/software interface (HSI) technology enables the software to control this hardware, which forms the basis of the entire design project. The CSRCompiler™ system, in combination with the CSRSpec™ language, automates the creation of this foundation.
CSRCompiler system and CSRSpec language form a complete register design solution for hardware, software, verification, and documentation.
This comprehensive solution allows teams to manage their designs collaboratively from a single source specification, ensuring the entire team has a complete, correct, up-to-date register design ecosystem.
Ensure best practices and
early engagement of the
entire design team
No need for additional
custom scripting or manual
post-processing
Ensure clean import of
third-party IP or internal
legacy data
Very fast iteration with
updated information across
design teams ensuring
data consistency
Specify and compile over
5 million registers
Over 1,000 functional, behavioral, syntactic, and semantic error checks
Generate 100,000
registers in seconds
We are redefining the deployment of inference at the edge with our highly efficient technology. These designs are highly complex, and the hardware and software interfaces are critical to performance and core functionality. Arteris CSRCompiler ensures the hardware and software interfaces function as expected, and that both the hardware and software teams can test interaction during chip development.
Charlie Roth
VP of Hardware R&D
We have used other CSR EDA tools over the years, but Arteris’s CSRCompiler offers the fullest featured and most flexible tools as well as easiest to use. It eliminates all confusion around CSR.
Andy Mansen
Senior Manager of Hardware Engineering
