The world’s #1 on-chip fabric is used by the world’s top semiconductor design teams as the backbone on-chip communications for chips targeting the fastest growing markets.
Arteris FlexWay™ 5 network-on-chip (NoC) IP is particularly well suited to cost-efficient, low-power Internet-of-Things (IoT) edge devices and microcontrollers (MCUs).
Everything design teams need to create the world’s best SoCs, faster
FlexWay is generated from simple elementary components which are combined by a powerful set of algorithms and an intuitive GUI, making it possible to build the optimal topology for your embedded application.
FlexWay supports simple to medium-complexity designs and easily scales efficiently between the two, containing only the optimum configuration required.
FlexWay is uncompromising in how it drives performant on-chip dataflow despite it’s power efficient design.
Explore additional features of FlexWay, download the datasheet.
Arteris CodaCache® last-level cache:
Automated flow to leverage SoC connectivity information:
Through the intuitive FlexWay UI
Saving hundreds of hours of work versus manual verification test benches
Advanced power management through clock gating, DVFS and GALS
Fewer wires using optimal NoC transport layer
Category | Features | FlexWay | FlexNoC | FlexGen |
---|---|---|---|---|
Target Audience and Scale | Smaller-scale MCU SoCs | |||
Small-medium scale SoCs | ||||
Large scale SoCs | ||||
Instances Per Design | Single NoC instance | |||
Multiple NoC instances | ||||
Network Interface Units (NIUs) | Up to 50 NIUs | |||
Up to 200 NIUs | ||||
Up to 1000 NIUs | with XL option | with XL option | ||
Compatibility | AXI, AHB, APB, OCP, PIF, AMBA5 | |||
ACE-Lite | ||||
Smart NoC Automation | Topology generation with minimum wire length | |||
Scripting-driven regular topology creation | ||||
Incremental design capability | ||||
Physical Awareness | Automatic timing closure assistance | |||
Floorplan visualization | ||||
Advanced Scalability | NIU tiling | with XL option | with XL option | |
Mesh topology editor | with XL option | with XL option | ||
Write broadcast stations | with XL option | with XL option | ||
Virtual channel links | with XL option | with XL option | ||
Source synchronous asynchronous bridges | with XL option | with XL option | ||
Up to 1024 bits data bus | with XL option | with XL option | ||
512 pending transaction support | with XL option | with XL option | ||
Optimizations | Optimization for performance, area and wire length | |||
Advanced Quality of Service (QoS) | ||||
Power management and security | ||||
Address and data protection schemes | ||||
Advanced in-circuit debug features | ||||
Multi-cycle SRAM support | ||||
Floorplan visualization | ||||
Add-on Options | Memory Re-order Buffer option | |||
Reliability option | ||||
Safety (up to ISO 26262 ASIL D) option | ||||
Advanced Scalability (XL) option | ||||
Markets | Automotive, Communications, Consumer Electronics, Enterprise Computing and Industrial Markets |
Seamlessly integrated extensions to the base FlexWay feature set
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