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FlexWay
Interconnect IP

Entry-level network-on-chip (NoC) IP for low power and cost efficiency.

FlexWay Interconnect IP

Overview

Efficient NoC development made simple and fast

Arteris FlexWay® 5 network-on-chip (NoC) IP is particularly well suited to cost-efficient, low-power IoT edge devices and microcontrollers (MCUs).

It revolutionizes SoC development with:

Optimized interconnects
Reduced time to market
Improved performance
Lower power consumption
Compact die size

By automating design tasks and supporting tailored topologies, FlexWay enhances system responsiveness and includes features to help optimize battery life, system integrity and performance. FlexWay 5 is used around the world for secure, performant, and resilient designs in mobile, automotive, consumer, and enterprise applications.

Advantages

A complete NoC product for rapid SoC development

Flexible topologies

FlexWay is generated from simple elementary components which are combined using a powerful set of algorithms and an intuitive GUI, making it possible to build the optimal topology for embedded applications.

Small to medium SoCs

FlexWay supports simple to medium-complexity designs and easily scales efficiently between the two, containing only the optimum configuration required.

Huge bandwidth

FlexWay is uncompromising in how it drives performant on-chip dataflow despite its power-efficient design.

FlexWay key features

Multi-clock/power/voltage domains and power management with unit-level clock gating
Multi-protocol support including AMBA 5 with QoS bandwidth regulator and limiter
Integrated SystemC simulation and UVM verification support
Import and Export to Magillem tools
AMBA 5 support of DVM 8.1 (Distributed Virtual Memory)
On-chip performance monitoring and debug
Debug and trace with ATB 128b and timestamps

Show More Features

Explore additional FlexWay features, download the datasheet.

Efficient transport of data through the SoC

Integration with Arteris CodaCache® last-level cache raises the bar on innovation:

Ideal for NoC applications with data re-use
Improves overall SoC latency and power

Efficient Transport of Data Through the SoC

NoC integration automated flow

Automated flow to leverage SoC connectivity information using Arteris Magillem:

Improved productivity with reduced process
Better quality with early error detections thanks to checkers

NoC Integration Automated Flow

FlexWay product benefits

Easy configuration

Use the intuitive FlexWay UI.

Automated verification

Save hundreds of hours of work compared to manual verification test benches.

Reduce power consumption

Advanced power management through clock gating, DVFS, and GALS.

Smaller die area

Fewer wires use optimal NoC transport layer.

Product Comparison

Product comparison table

Category	Features	FlexNoC	FlexGen
Target Audience and Scale	Smaller-scale MCU SoCs
	Small-medium scale SoCs
	Large scale SoCs
Instances Per Design	Single NoC instance
Instances Per Design	Multiple NoC instances
Network Interface Units (NIUs) per die¹	Up to 50 NIUs
	Up to 200 NIUs
	Up to 1000 NIUs	with XL option	with XL option
	Up to 2000 NIUs	with 2XL option	with 2XL option
Compatibility	AXI, AHB, APB, OCP, PIF, AMBA5
Compatibility	ACE-Lite
Smart NoC Automation	Topology generation with minimum wire length
	Scripting-driven regular topology creation
	Incremental design capability
Physical Awareness	Automatic timing closure assistance
Physical Awareness	Floorplan visualization
Advanced Scalability	NIU tiling^2,3	with XL/2XL options	with XL/2XL options
	Mesh topology editor	with XL/2XL options	with XL/2XL options
	Write broadcast stations	with XL/2XL options	with XL/2XL options
	Virtual channel links	with XL/2XL options	with XL/2XL options
	Source synchronous asynchronous bridges	with XL/2XL options	with XL/2XL options
	Up to 1024 bits data bus	with XL option	with XL option
	Up to 2048 bits data bus	with 2XL option	with 2XL option
	512 pending transaction support	with XL option	with XL option
	1024 pending transaction support	with 2XL option	with 2XL option
Optimizations	Optimization for performance, area and wire length
	Advanced Quality of Service (QoS)
	Power management and security
	Address and data protection schemes
	Advanced in-circuit debug features
	Multi-cycle SRAM support
	Floorplan visualization
Add-on Options	Memory Re-order Buffer option
	Reliability option
	Safety (up to ISO 26262 ASIL D) option
	Advanced Scalability (XL/2XL) options
Markets	Automotive, Communications, Consumer Electronics, Enterprise Computing and Industrial Markets

¹ NIU limits apply per individual monolithic die or chiplet design.

² FlexGen is advised for customers seeking to create a mesh topology using tiled NIUs.

³ Customers seeking to license multiple optional features should disclose its requirements to Arteris support engineers. Given the increasing complexity of designs, customers are advised to communicate their specific design needs to Arteris support engineers.

FlexWay fully integrated product options

Option

Resilience: Safety

ISO 26262 Functional Safety (FuSa)
Multi-ASIL support
Interconnect-wide ECC support

Learn more about option

Option

Performance: Reorder Buffer

Single and Multi-channel reorder buffers (ROB):

Avoid ordering rule blocks
Avoid response serialization bottlenecks
Allow concurrent memory channel reads

Learn more about product

Customer Testimonials

Trusted by innovative
 companies everywhere

Arteris is the proven industry standard for system IP with responsive support, and deploying their technology guaranteed we met our performance requirements and aggressive timelines, Arteris FlexWay interconnect IP allowed us to close timing smoothly on a complex, multicore machine learning architecture. We look forward to working together on the next project.