Overview
As System-on-Chip (SoC) designs grow more complex, traditional buses and crossbars are being replaced by advanced Network-on-Chip (NoC) interconnect solutions. This transformation addresses the increasing demands for power efficiency, scalability, and integration in modern microcontroller (MCU) architectures. NoC technology, pioneered by Arteris Inc., leverages packet-based data transfer methods, offering significant advantages in power consumption, performance, and die area utilization compared to conventional interconnect methods.
Arteris’ comprehensive NoC solutions—FlexNoC, FlexWay, CodaCache, and Magillem—are designed to meet the challenges of modern MCU designs. These technologies provide enhanced power efficiency, streamlined interconnect and memory architectures, and simplified design workflows. This is particularly relevant for MCUs powering IoT devices, automotive applications, and industrial systems that demand low power, high reliability, and advanced features like AI and cybersecurity.
Key Benefits
Optimized PPA
FlexNoC and FlexWay interconnect solutions enhance power, performance, and area efficiency, enabling advanced MCUs for IoT and industrial applications. Both can be paired with CodaCache which further improves memory access and bandwidth, vital for AI/ML tasks in high-performance MCUs.
Safety
Using Arteris System IP, developers achieve ISO 26262-compliant design, verification, and documentation of safety-critical automotive systems and create ISO 26262-compliant Networks-on-Chip.
Simplified SoC Integration
Magillem tools automate SoC design workflows, supporting IP-XACT standards for faster development cycles and improved collaboration.
Arteris collaborates with leading semiconductor vendors and IoT solution providers to deliver optimized interconnect IP solutions for modern MCUs.
Standards
From a system design perspective, Arteris supports AMBA protocols, ISO 26262, and other standards for functional safety and interoperability.
Arteris already works with partners like Arm by implementing the latest AMBA standards and with Synopsys, Cadence, Alphawave, Blue Cheetah Analog, Innosilicon, and others to align on NoC to Controller/PHY interfaces::
Featured Product
The cost-effective interconnect for entry-level MCUs, ideal for IoT and consumer electronics. FlexWay also works well with CodaCache, the Integrated last-level cache controller for optimized memory performance in AI-driven tasks.
Products
- Webinars
- Presentations
- Technical Papers
- Accelerate and Derisk RISC-V-based SoC Designs with Arteris
- Making SoC Integration Simple – Achieve Higher Productivity and Quality
- A Configurable Test Infrastructure using a Mixed-Language and Mixed-Level IP Integration IP-XACT Flow
- A Design Flow for Critical Embedded Systems
- A Power Consumption Estimation Approach for Embedded Software Design using Trace Analysis
- A SystemC Extension for Enabling Tighter Integration of IP-XACT Platforms with Virtual Prototypes
- AMS System-Level Verification and Validation using UVM in SystemC and SystemC AMS: Automotive Use Cases
- Application Driven Network on Chip Architecture Exploration & Refinement for a Complex SoC
- Building a Portable Stimulus flow based on Magillem IP-XACT Packaging
- Fundamentals of Semiconductor ISO 26262 Certification: People, Process and Product
- Generation of UVM compliant Test Benches for Automotive Systems using IP-XACT with UVM-SystemC and SystemC AMS
- HW/SW Interface Generation Flow Based on Abstract Models of System Applications and Hardware Architectures
- Optimizing Enterprise-Class SSD Host Controller Design with Arteris FlexNoC Network-On-Chip Interconnect IP
- Power dissipation of the Network-On-Chip in a System-on-Chip for MPEG-4 video encoding
- Routing Congestion: The Growing Cost of Wires in Systems-on-Chip
- Using machine learning for characterizations of NoC components
- Using Virtual Prototypes to Improve the Traceability of Critical Embedded Systems Flow
- Podcasts
- Electronic Design: All About NoCs
- SemiWiki: A Broad View of Design Architectures and the Role of the NoC with Arteris’ Michal Siwinski
- EE Journal: The Freedom to Innovate: Arteris and the Rise of RISC-V
- EE Journal: The Network-on-Chip Pioneer: How Arteris Enabling SoC Developers to Create Physically Valid NoCs Faster
- Videos