Latest News

Semiconductor Engineering: Artificial Intelligence Chips: Past, Present and Future

Ty Garibay, CTO at Arteris IP, authored this Semiconductor Engineering article:

Artificial Intelligence Chips: Past, Present and Future

 

August 2nd, 2018 - By Ty Garibay

Topics: semiconductor memory autonomous vehicles autonomous driving semiconductor engineering deep learning arteris ip SoCs interconnects algorithms AI chips

IEEE Electronics 360: How to Efficiently Achieve ASIL-D Compliance Using NoC Technology

Learn from the experts at Arteris IP in this new White Paper:

How to Efficiently Achieve ASIL-D Compliance Using NoC Technology

 

 

 

Topics: SoC economics Synopsys functional safety semiconductor automotive ADAS ISO 26262 compliance artificial intelligence arteris ip latency ASIL D interconnects soc designers aerospace aeronautics LED kurt shuler Z01X Austemper

Semiconductor Engineering: Not Enough Respect for SoC Interconnect

K. Charles Janac, CEO at Arteris IP, shares his opinion in this week's blog appearing in Semiconductor Engineering:

Not Enough Respect for SoC Interconnect

 

July 30th, 2018 - By K. Charles Janac

Topics: SoC functional safety SoC security semiconductor advanced driver assistance systems adas flexnoc interconnect semiconductor engineering soc architecture AI arteris ip ips K. Charles Janac on-chip memory interconnects logic IP modules SoC assembly topologies 5G mobility QoS

Semiconductor Engineering: When Bugs Escape

Chirag Gandi, Director of Verification at Arteris IP, chats with Brian Bailey in this Semiconductor Engineering article:

When Bugs Escape

 

July 26th, 2018 - By Brian Bailey

Topics: SoC semiconductor semiconductor engineering arteris ip interconnects deadlocks emulation silicon RTL formal verification layered verification corner-case bugs

Semiconductor Engineering: Safety, Security and PPA Tradeoffs

Kurt Shuler, VP of Marketing at Arteris IP, quoted in this Semiconductor Engineering article:

Safety, Security and PPA Tradeoffs

 

July 23th, 2018 - By Brian Bailey

Topics: SoC automotive semiconductors semiconductor semiconductor engineering arteris ip TCP/IP interconnects packets logic

Arteris IP Ncore® and FlexNoC® Interconnects and Resilience Packages Licensed by Mobileye for AI-Powered EyeQ Chips

Next generation ASIL B(D) autonomous driving systems to be enabled by ISO 26262-compliant cache coherent and non-coherent interconnect IP

CAMPBELL, Calif. — July 10, 2018 — Arteris IP, the leading supplier of innovative, silicon-proven network-on-chip(NoC) interconnect intellectual property, today announced that Mobileye has purchased multiple licenses of Arteris IP Ncore Cache Coherent Interconnect, FlexNoC Interconnect, and the Ncore and FlexNoC Resilience Packages for functional safety and artificial intelligence (AI) hardware acceleration. This broad portfolio of Arteris IP interconnect technology will be the on-chip communications backbone of Mobileye’s next-generation ISO 26262 ASIL B(D) capable next generation EyeQ system-on-chip (SoC) devices.

We chose the Arteris Ncore cache coherent interconnect because of its unique proxy caches and their ability to underpin high-performance, low power, cache coherent clusters of our unique AI accelerators. And with our prior experience using FlexNoC and the FlexNoC Resilience Packages for functional safety, we trust Arteris IP to be the highest performing and safest choice for ISO 26262-compliant NoC IP.”


Elchanan Rushinek, Vice President of EngineeringMobileye

Topics: new customer flexnoc resilience package iso 26262 ASIL mobileye ncore resilience package flexnoc interconnect ncore cache coherent interconnect eyeq

Arteris IP Achieves Major Milestone: 100th Customer

Semiconductor companies accelerate adoption of Arteris Network-on-Chip (NoC) interconnect IP to create more efficient autonomous driving and AI chips

CAMPBELL, Calif. — June 26, 2018 — Arteris IP, the world’s leading supplier of silicon-proven commercial network-on-chip (NoC) interconnect intellectual property (IP)today announced that 100 customers have adopted its on-chip communication technologies in a wide variety of system-on-chip (SoC) designs for automotive, consumer electronics, artificial intelligence (AI) and server markets.

Earning our 100thcustomer is a result of our substantial technology lead, unsurpassed product quality, and highly experienced global support team.”


K. Charles Janac, President and CEOArteris IP

Topics: new customer samsung renesas NXP Semiconductors mobileye

Arteris IP and Magillem Partner to Create Integrated System-on-Chip Architecture Environment

Single environment allows design teams to more easily build AI and autonomous driving SoCs using FlexNoC and Ncore IP and share data for ISO 26262 compliance

CAMPBELL, Calif. — June 25, 2018 — Arteris IP, the world’s leading supplier of silicon-proven commercial network-on-chip (NoC) interconnect intellectual property (IP), and Magillem, the leading provider of front-end design XML solutions and best-in-class tools to reduce the global cost of complex designs, today announced a partnership and product integration that accelerates the architectural definition of complex chips.

The Magillem integration with Arteris FlexNoC and Ncore interconnect IP enables not only the easier design of highly complex systems-on-chip, but also more efficient and automated information sharing between IP providers, semiconductor vendors, ISMs and systems houses.”


Isabelle Geday, CEOMagillem

Topics: new product XML arteris ip partner ip-xact magillem

Arteris IP Announces CodaCache™️ Standalone Last Level Cache

Unlock the full performance of your SoC architecture with a last level cache

CAMPBELL, Calif. — June 7, 2018 — Arteris IP, the leading supplier of innovative, silicon-proven network-on-chip(NoC) interconnect intellectual property, today announced the CodaCache standalone last level cache (LLC) for high-performance systems-on-chip (SoCs).

Designers will be attracted to the variety of use cases that CodaCache IP supports, including dedicated, shared, and distributed partitioning, as well as its use as on-chip scratchpad storage.”


Mike Demler, Senior Analyst and Senior EditorThe Linley Group and  Microprocessor Report

Topics: new product CodaCache

Arteris FlexNoC® Licensed by Canaan Creative for Artificial Intelligence ASICs

Semiconductor interconnect IP enables power-efficient processing in semi-autonomous aerial imaging devices

CAMPBELL, Calif. — May 1, 2018 — Arteris IP, the innovative supplier of silicon-proven commercial network-on-chip (NoC) interconnect intellectual property, today announced that Canaan Creative Co., Ltd., has licensed Arteris FlexNoC interconnect IP as the on-chip communications backbone of their next generation artificial intelligence (AI) ASIC.

Topics: Arteris FlexNoC new customer china artificial intelligence AI Canaan Creative