Enabling SoC Developers to Create Physically Valid NoCs Faster

The world’s #1 on-chip fabric is used by the world’s top semiconductor design teams as the backbone on-chip communications for chips targeting the fastest growing markets.

The latest generation FlexNoC 5 Interconnect with its integrated physical awareness technology, gives place and route teams a much better starting point while simultaneously reducing interconnect area and power consumption. FlexNoC 5 delivers up to 5X shorter turn-around-time versus manual physical iterations.

The combined use of FlexNoC and Ncore IP in an ASIC design delivers unparalleled performance optimization, scalability, and system integration, enabling robust cache coherence, efficient communication, and flexibility, leading to market differentiation and accelerated time-to-market.

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SoC Developers

The Most Complete Network-On-Chip Product

Everything design teams need to create the world’s best SoCs, faster

Flexible Topologies

Flexible Topologies

FlexNoC is generated from simple elementary components which are combined by a powerful set of underlying algorithms and an intuitive GUI, making it possible to build any topology.

Small to Large SoCs

Small to Large SoCs

FlexNoC easily supports long cross-chip paths by leveraging source-synchronous communications and virtual channels.

Huge Bandwidth

Huge Bandwidth

FlexNoC drives performant on-chip data flow and access to off-chip memory by enabling multi-channel HBMx memory and high bandwidth data paths.

FlexNoC 5 Key Features

  • Auto-timing closure assist
  • Topology visualized directly on floorplan
  • Multi-clock/power/voltage domains and power management with unit-level clock gating
  • Multi-protocol support including AMBA 5 with QoS bandwidth regulator and limiter Enumerations
  • General optimizations for lower area e.g. up to 30% for some NoC elements depending on configuration
  • Native and user-defined firewall security
  • Import and export to Magillem tools
  • AMBA 5 support of DVM 8.1 (Distributed Virtual Memory)
  • On-chip performance monitoring and debug
  • Debug and trace with ATB 128b and timestamps
FlexNoC 5 Key Features

NoC Integration Automated Flow


Automated flow to leverage SoC connectivity information:

  • Improved productivity with reduced process
  • Better quality with early errors detections thanks to the checkers

Learn about Magillem Connectivity and Magillem Registers

NoC Integration Automated Flow

FlexNoC Product Benefits

Higher Frequencies, Lower Latencies

Higher Frequencies, Lower Latencies

Using built-in NoC performance analysis exploration tools

Lower Power Consumption

Lower Power Consumption

Advanced power management through clock gating, DVFS and GALS

Smaller Die Area

Smaller Die Area

Fewer wires using optimal NoC transport layer

Speedy Timing Closure

Speedy Timing Closure

Early physical awareness for faster convergence without re-designs

Easy Configuration

Easy Configuration

Through the intuitive FlexNoC 5 UI

Automated Verification

Automated Verification

Saving hundreds of hours of work versus manual verification test benches

Shorter Schedules

Shorter Schedules

Fewer iteration loops

Higher Profit

Higher Profit

Reduced TTM from FlexNoC design efficiency savings

Read more about why we are unique on our NoC Technology page.

FlexNoC 5 Product Options

Seamlessly Integrated Extensions to the Base FlexNoC 5 Feature Set

Performance: Reorder Buffer  Option

Performance: Reorder Buffer Option

Multi-channel reorder buffers (ROB):

  • Avoid ordering rule blocks
  • Avoid response serialization bottlenecks
  • Allow concurrent memory channel reads
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